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    INSTRUCTION AND LOGIC TO EFFICIENTLY MONITOR LOOP TRIP COUNT
    2.
    发明申请
    INSTRUCTION AND LOGIC TO EFFICIENTLY MONITOR LOOP TRIP COUNT 有权
    指令和逻辑到有效的监视器循环次数

    公开(公告)号：US20140208085A1

    公开(公告)日：2014-07-24

    申请号：US13996861

    申请日：2012-03-30

    申请人： Jaewoong Chung ,  Hyunchul Park ,  Hongbo Rong ,  Cheng Wang ,  Youfeng Wu

    发明人： Jaewoong Chung ,  Hyunchul Park ,  Hongbo Rong ,  Cheng Wang ,  Youfeng Wu

    IPC分类号： G06F9/32

    CPC分类号： G06F9/325 ,  G06F8/443 ,  G06F9/30072 ,  G06F9/3842 ,  G06F9/3857 ,  G06F11/3409 ,  G06F11/348 ,  G06F2201/88

    摘要： Logic and instruction to efficiently monitor loop trip count. Loop trip count information of a loop may be stored in a dedicated hardware buffer. Average loop trip count of the loop may be calculated based on the stored loop trip count information. Based on the average trip count, loop optimizations may be applied or removed from the loop. The stored loop trip count information may include an identifier identifying the loop, a total loop trip count of the loop, and an exit count of the loop.

    摘要翻译： 有效监控回路行程数的逻辑和指令。 循环的循环行程计数信息可以存储在专用硬件缓冲器中。 可以基于存储的循环行程计数信息来计算循环的平均循环行程计数。 基于平均行程计数，循环优化可以从循环中应用或移除。 存储的循环行程计数信息可以包括标识循环的标识符，循环的总循环行程计数以及循环的退出计数。

    Context-sensitive slicing for dynamically parallelizing binary programs
    3.
    发明授权
    Context-sensitive slicing for dynamically parallelizing binary programs 有权
    用于动态并行化二进制程序的上下文相关切片

    公开(公告)号：US08443343B2

    公开(公告)日：2013-05-14

    申请号：US12607589

    申请日：2009-10-28

    申请人： Joseph Blomstedt ,  Cheng Wang ,  Youfeng Wu

    发明人： Joseph Blomstedt ,  Cheng Wang ,  Youfeng Wu

    IPC分类号： G06F9/45

    CPC分类号： G06F11/3604 ,  G06F8/433 ,  G06F8/456

    摘要： In one embodiment of the invention a method comprising (1) receiving an unstructured binary code region that is single-threaded; (2) determining a slice criterion for the region; (3) determining a call edge, a return edge, and a fallthrough pseudo-edge for the region based on analysis of the region at a binary level; and (4) determining a context-sensitive slice based on the call edge, the return edge, the fallthrough pseudo-edge, and the slice criterion. Embodiments of the invention may include a program analysis technique that can be used to provide context-sensitive slicing of binary programs for slicing hot regions identified at runtime, with few underlying assumptions about the program from which the binary is derived. Also, in an embodiment a slicing method may include determining a context-insensitive slice, when a time limit is met, by determining the context-insensitive slice while treating call edges as a normal control flow edges.

    摘要翻译： 在本发明的一个实施例中，一种方法包括（1）接收单线程的非结构化二进制码区域; （2）确定该区域的切片标准; （3）基于二进制级别的区域的分析确定该区域的通话边缘，返回边缘和下降伪边缘; 和（4）基于呼叫边缘，返回边缘，下降伪边缘和切片标准来确定上下文敏感切片。 本发明的实施例可以包括程序分析技术，其可以用于提供二进制程序的上下文敏感切片，用于对在运行时识别的热区域进行切片，而关于从其导出二进制的程序的几个基本假设。 此外，在一个实施例中，切片方法可以包括当满足时间限制时，通过在将呼叫边缘视为正常控制流边缘的同时确定上下文不敏感切片来确定上下文不敏感切片。

    Efficient and consistent software transactional memory
    5.
    发明授权
    Efficient and consistent software transactional memory 有权
    高效一致的软件事务内存

    公开(公告)号：US08060482B2

    公开(公告)日：2011-11-15

    申请号：US11648012

    申请日：2006-12-28

    申请人： Cheng Wang ,  Youfeng Wu ,  Wei-Yu Chen ,  Bratin Saha ,  Ali-Reza Adl-Tabatabai

    发明人： Cheng Wang ,  Youfeng Wu ,  Wei-Yu Chen ,  Bratin Saha ,  Ali-Reza Adl-Tabatabai

    IPC分类号： G06F7/00 ,  G06F17/00 ,  G06F17/30

    CPC分类号： G06F8/458 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834 ,  G06F9/3859 ,  G06F9/3863 ,  G06F9/467

    摘要： A method and apparatus for efficient and consistent validation/conflict detection in a Software Transactional Memory (STM) system is herein described. A version check barrier is inserted after a load to compare versions of loaded values before and after the load. In addition, a global timestamp (GTS) is utilized to track a latest committed transaction. Each transaction is associated with a local timestamp (LTS) initialized to the GTS value at the start of a transaction. As a transaction commits it updates the GTS to a new value and sets versions of modified locations to the new value. Pending transactions compare versions determined in read barriers to their LTS. If the version is greater than their LTS indicating another transaction has committed after the pending transaction started and initialized the LTS, then the pending transaction validates its read set to maintain efficient and consistent transactional execution.

    摘要翻译： 这里描述了用于在软件事务存储器（STM）系统中有效且一致的验证/冲突检测的方法和装置。 在加载之后插入版本检查障碍，以便在加载之前和之后比较加载值的版本。 此外，使用全局时间戳（GTS）来跟踪最近提交的事务。 每个事务与在事务开始时初始化为GTS值的本地时间戳（LTS）相关联。 作为事务提交，将GTS更新为新值，并将修改的位置的版本设置为新值。 待处理的交易将比较其在LTS阅读障碍中确定的版本。 如果版本大于其LTS，指示在挂起事务启动并初始化LTS之后另一个事务已经提交，则挂起的事务会验证其读取集合以保持有效且一致的事务执行。

    Transient fault detection by integrating an SRMT code and a non SRMT code in a single application
    6.
    发明授权
    Transient fault detection by integrating an SRMT code and a non SRMT code in a single application 有权

    公开(公告)号：US07937620B2

    公开(公告)日：2011-05-03

    申请号：US11745403

    申请日：2007-05-07

    申请人： Cheng Wang ,  Youfeng Wu

    发明人： Cheng Wang ,  Youfeng Wu

    IPC分类号： G06F11/00 ,  G06F11/14

    CPC分类号： G06F11/1497 ,  G06F8/457

    摘要： Disclosed is a method for running a first code generated by a Software-based Redundant Multi-Threading (SRMT) compiler along with a second code generated by a normal compiler at runtime, the first code including a first function and a second function, the second code including a third function. The method comprises running the first function in a leading thread and a tailing thread (104); running the third function in a single thread (106), the leading thread calls the third function and running the second function in the leading thread and the tailing thread (108), the third function calls the second function. The present disclosure provides a mechanism for handling function calls wherein SRMT functions and binary functions can call each other irrespective of whether the callee function is a SRMT function or a binary function and thereby dynamically adjusts reliability and performance tradeoff based on run-time information and user selectable policies.

    Methods and apparatus to form a transactional objective instruction construct from lock-based critical sections
    7.
    发明授权
    Methods and apparatus to form a transactional objective instruction construct from lock-based critical sections 有权
    从基于锁的关键部分形成事务性目标指令构造的方法和装置

    公开(公告)号：US07844946B2

    公开(公告)日：2010-11-30

    申请号：US11535205

    申请日：2006-09-26

    申请人： Youfeng Wu ,  Cheng Wang

    发明人： Youfeng Wu ,  Cheng Wang

    IPC分类号： G06F9/44 ,  G06F9/46

    CPC分类号： G06F9/466 ,  G06F9/524

    摘要： Methods and an apparatus for forming a transaction object instruction construct are provided. An example method translates a source instruction construct to form a transactional objective instruction construct, executes the transactional objective instruction construct, intercepts an aborted transaction associated with the transactional objective instruction construct during execution, maintains a graph of nodes and edges associated with the executed transactional objective instruction construct to predict a deadlock situation, and resolves the deadlock situation associated with the transactional objective instruction construct based on the graph.

    摘要翻译： 提供了用于形成交易对象指令结构的方法和装置。 一个示例性方法将源指令结构转换成一个事务性目标指令结构，执行事务目标指令结构，在执行期间拦截与事务性目标指令结构相关联的异常事务，维护与执行的事务目标相关联的节点和边的图 指令结构来预测死锁情况，并根据图表解决与事务性目标指令构造相关的死锁情况。

    COMPACT TRACE TREES FOR DYNAMIC BINARY PARALLELIZATION
    9.
    发明申请
    COMPACT TRACE TREES FOR DYNAMIC BINARY PARALLELIZATION 有权
    用于动态二进制并行化的紧凑跟踪

    公开(公告)号：US20100083236A1

    公开(公告)日：2010-04-01

    申请号：US12242371

    申请日：2008-09-30

    申请人： Joao Paulo Porto ,  Edson Borin ,  Youfeng Wu ,  Cheng Wang

    发明人： Joao Paulo Porto ,  Edson Borin ,  Youfeng Wu ,  Cheng Wang

    IPC分类号： G06F9/44

    CPC分类号： G06F9/45516

    摘要： Methods and apparatus relating to compact trace trees for dynamic binary parallelization are described. In one embodiment, a compact trace tree (CTT) is generated to improve the effectiveness of dynamic binary parallelization. CTT may be used to determine which traces are to be duplicated and specialized for execution on separate processing elements. Other embodiments are also described and claimed.

    摘要翻译： 描述了用于动态二进制并行化的紧凑跟踪树的方法和设备。 在一个实施例中，生成紧凑跟踪树（CTT）以提高动态二进制并行化的有效性。 可以使用CTT来确定哪些跟踪被复制并专用于在单独的处理元件上执行。 还描述和要求保护其他实施例。