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17 条记录 (耗时 0.028 秒)

    Extended trench for preventing interaction between components of stacked capacitors
    3.
    发明授权
    Extended trench for preventing interaction between components of stacked capacitors 有权
    扩展沟槽，用于防止堆叠电容器组件之间的相互作用

    公开(公告)号：US06222220B1

    公开(公告)日：2001-04-24

    申请号：US09209198

    申请日：1998-12-10

    申请人： Chenting Lin ,  Andreas Knorr

    发明人： Chenting Lin ,  Andreas Knorr

    IPC分类号： H01L31119

    CPC分类号： H01L27/10852

    摘要： A stacked capacitor, in accordance with the present invention includes a conductive plug disposed within a trench for connecting to an access device. A barrier is formed on the plug and is disposed within the trench. A dielectric layer is formed over the trench, the dielectric layer forming a hole therethrough exposing at least a portion of the barrier. A first electrode is formed within the hole and extends from the hole. A capacitor dielectric layer is formed on the first electrode and separating the first electrode from a second electrode, and the dielectric layer and the first electrode substantially prevent chemical interactions between materials of the barrier and materials of the capacitor dielectric layer and an oxidizing environment used to form the capacitor dielectric layer. A method of fabrication is also included.

    摘要翻译： 根据本发明的层叠电容器包括设置在沟槽内用于连接到接入装置的导电插头。 在插头上形成屏障并设置在沟槽内。 在沟槽上形成电介质层，电介质层形成穿过其的至少一部分屏障的孔。 第一电极形成在孔内并从孔延伸。 电容器电介质层形成在第一电极上，并且将第一电极与第二电极分开，并且电介质层和第一电极基本上防止了阻挡材料和电容器介电层的材料之间的化学相互作用以及用于 形成电容器介电层。 还包括制造方法。

    Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials
    7.
    发明授权
    Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials 失效
    用于DRAM的多层Pt电极和具有高K电介质材料的FRAM

    公开(公告)号：US06794705B2

    公开(公告)日：2004-09-21

    申请号：US09751551

    申请日：2000-12-28

    申请人： Jingyu Lian ,  Chenting Lin ,  Nicolas Nagel ,  Michael Wise

    发明人： Jingyu Lian ,  Chenting Lin ,  Nicolas Nagel ,  Michael Wise

    IPC分类号： H01L27108

    CPC分类号： H01L28/75 ,  H01L27/10852 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65 ,  Y10S257/906 ,  Y10S257/908

    摘要： A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.

    摘要翻译： 一种多层电极（246）及其制造方法，其中通过第一导电衬垫（240）和第二导电衬套（242）将导电区域（244）与阻挡层（222）分离。 第一导电层（240）包括Pt，并且第二导电衬垫（242）包括导电氧化物的薄层。 多层电极（246）防止氧扩散通过顶部导电区域（244）并且减少电极图案化期间的材料变化。

    CMP uniformity
    8.
    发明授权
    CMP uniformity 有权
    CMP均匀性

    公开(公告)号：US06685796B1

    公开(公告)日：2004-02-03

    申请号：US09639986

    申请日：2000-08-16

    申请人： Chenting Lin ,  Robert van den Berg ,  Sumit Pandey

    发明人： Chenting Lin ,  Robert van den Berg ,  Sumit Pandey

    IPC分类号： H01L21306

    CPC分类号： B24B37/04 ,  B24B57/02

    摘要： Improved CMP uniformity is achieved by providing improved control of the slurry distribution. Improved slurry distribution is achieved by, for example, the use of a slurry dispenser that dispenses slurry from a plurality of dispensing points. Providing a squeeze bar between the slurry dispenser and wafer to redistribute the slurry also improves the slurry distribution.

    摘要翻译： 通过提供浆料分布的改进控制来实现改进的CMP均匀性。 通过例如使用从多个分配点分配浆料的浆料分配器来实现改进的浆料分布。 在浆料分配器和晶片之间提供挤压棒以重新分配浆料也改善了浆料分布。

    Method of enhancing semiconductor wafer release
    10.
    发明授权
    Method of enhancing semiconductor wafer release 有权
    增强半导体晶片释放的方法

    公开(公告)号：US6132294A

    公开(公告)日：2000-10-17

    申请号：US161793

    申请日：1998-09-28

    申请人： Chenting Lin

    发明人： Chenting Lin

    IPC分类号： B24B37/04 ,  H01L21/304 ,  H01L21/306 ,  B24B1/00

    CPC分类号： H01L21/02024 ,  B24B37/042 ,  B24B37/345

    摘要： In accordance with the present invention, a method is disclosed for releasing semiconductor wafers from a polishing pad. The method includes the steps of applying a slurry to a polishing pad, rotating the polishing pad having slurry thereon while applying pressure against a wafer such that the wafer is polished by the slurry, introducing water to the polishing pad, increasing the rotational speed of the polishing pad to remove a portion of the slurry, decreasing the pressure during the step of increasing rotational speed to substantially prevent further polishing and removing the wafer from the polishing pad.

    摘要翻译： 根据本发明，公开了一种从抛光垫释放半导体晶片的方法。 该方法包括以下步骤：将浆料施加到抛光垫上，使其上具有浆料的抛光垫旋转，同时向晶片施加压力，使得晶片由浆料抛光，将水引入抛光垫，增加该抛光垫的转速 抛光垫以去除一部分浆料，在增加旋转速度的步骤期间降低压力，从而基本上防止进一步抛光并从抛光垫移除晶片。