公开(公告)号：US08835305B2

公开(公告)日：2014-09-16

申请号：US13562953

申请日：2012-07-31

申请人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Samuel S. Choi ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Wai-Kin Li ,  Christopher J. Penny ,  Shom Ponoth ,  Yunpeng Yin

发明人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Samuel S. Choi ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Wai-Kin Li ,  Christopher J. Penny ,  Shom Ponoth ,  Yunpeng Yin

IPC分类号： H01L21/4763 ,  H01L23/12 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L23/53295 ,  H01L21/76807 ,  H01L21/76813 ,  H01L21/76831 ,  H01L21/76844 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： The profile of a via can be controlled by forming a profile control liner within each via opening that is formed into a dielectric material prior to forming a line opening within the dielectric material. The presence of the profile control liner within each via opening during the formation of the line opening prevents rounding of the corners of a dielectric material portion that is present beneath the line opening and adjacent the via opening.

摘要翻译： 可以通过在形成介电材料之前形成电介质材料的每个通孔开口内形成轮廓控制衬垫来控制通孔的轮廓，然后在电介质材料内形成线路开口。 在形成线路开口期间在每个通孔开口内存在轮廓控制衬垫防止存在于线路开口下方并且邻近通孔开口的电介质材料部分的拐角的四舍五入。

公开(公告)号：US20140035142A1

公开(公告)日：2014-02-06

申请号：US13562953

申请日：2012-07-31

申请人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Samuel S. Choi ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Wai-Kin Li ,  Christopher J. Penny ,  Shom Ponoth ,  Yunpeng Yin

发明人： Chih-Chao Yang ,  Shyng-Tsong Chen ,  Samuel S. Choi ,  Steven J. Holmes ,  David V. Horak ,  Charles W. Koburger, III ,  Wai-Kin Li ,  Christopher J. Penny ,  Shom Ponoth ,  Yunpeng Yin

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L23/53295 ,  H01L21/76807 ,  H01L21/76813 ,  H01L21/76831 ,  H01L21/76844 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： The profile of a via can be controlled by forming a profile control liner within each via opening that is formed into a dielectric material prior to forming a line opening within the dielectric material. The presence of the profile control liner within each via opening during the formation of the line opening prevents rounding of the corners of a dielectric material portion that is present beneath the line opening and adjacent the via opening.

摘要翻译： 可以通过在形成介电材料之前形成电介质材料的每个通孔开口内形成轮廓控制衬垫来控制通孔的轮廓，然后在电介质材料内形成线路开口。 在形成线路开口期间在每个通孔开口内存在轮廓控制衬垫防止存在于线路开口下方并且邻近通孔开口的电介质材料部分的拐角的四舍五入。

公开(公告)号：US09059250B2

公开(公告)日：2015-06-16

申请号：US13398875

申请日：2012-02-17

申请人： Samuel S. Choi ,  Wai-kin Li

发明人： Samuel S. Choi ,  Wai-kin Li

IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213

CPC分类号： H01L21/76816 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139

摘要： A combination of gases including at least a fluorocarbon gas, oxygen, and an inert sputter gas is employed to etch at least one opening into an organic photoresist. The amount of oxygen is controlled to a level that limits conversion of a metallic nitride material in an underlying hard mask layer to a metal oxide, and causes organic polymers generated from the organic photoresist to cover peripheral regions of each opening formed in the organic photoresist. The hard mask layer is etched with a taper by the oxygen-limited fluorine-based etch chemistry provided by the combination of gases. The taper angle can be controlled such that a shrink ratio of the lateral dimension by the etch can exceed 2.0.

摘要翻译： 使用包括至少一种碳氟化合物气体，氧气和惰性溅射气体的气体的组合来将至少一个开口蚀刻到有机光致抗蚀剂中。 将氧的量控制在将下面的硬掩模层中的金属氮化物材料转化为金属氧化物的水平，并且使由有机光致抗蚀剂产生的有机聚合物覆盖在有机光致抗蚀剂中形成的每个开口的周边区域。 通过由气体组合提供的受氧限定的氟基蚀刻化学技术，通过锥形蚀刻硬掩模层。 可以控制锥角使得通过蚀刻的横向尺寸的收缩率可以超过2.0。

公开(公告)号：US20130214391A1

公开(公告)日：2013-08-22

申请号：US13398875

申请日：2012-02-17

申请人： Samuel S. Choi ,  Wai-kin Li

发明人： Samuel S. Choi ,  Wai-kin Li

IPC分类号： H01L29/02 ,  H01L21/28

CPC分类号： H01L21/76816 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139

摘要： A combination of gases including at least a fluorocarbon gas, oxygen, and an inert sputter gas is employed to etch at least one opening into an organic photoresist. The amount of oxygen is controlled to a level that limits conversion of a metallic nitride material in an underlying hard mask layer to a metal oxide, and causes organic polymers generated from the organic photoresist to cover peripheral regions of each opening formed in the organic photoresist. The hard mask layer is etched with a taper by the oxygen-limited fluorine-based etch chemistry provided by the combination of gases. The taper angle can be controlled such that a shrink ratio of the lateral dimension by the etch can exceed 2.0.

摘要翻译： 使用包括至少一种碳氟化合物气体，氧气和惰性溅射气体的气体的组合来将至少一个开口蚀刻到有机光致抗蚀剂中。 将氧的量控制在将下面的硬掩模层中的金属氮化物材料转化为金属氧化物的水平，并且使由有机光致抗蚀剂产生的有机聚合物覆盖在有机光致抗蚀剂中形成的每个开口的周边区域。 通过由气体组合提供的受氧限定的氟基蚀刻化学技术，通过锥形蚀刻硬掩模层。 可以控制锥角使得通过蚀刻的横向尺寸的收缩率可以超过2.0。

公开(公告)号：US20150137312A1

公开(公告)日：2015-05-21

申请号：US14580539

申请日：2014-12-23

申请人： Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali Lustig ,  Andrew H. Simon ,  Junjing Bao

发明人： Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali Lustig ,  Andrew H. Simon ,  Junjing Bao

IPC分类号： H01L23/525 ,  H01L23/528 ,  H01L23/522

CPC分类号： H01L23/5256 ,  H01H69/02 ,  H01H85/046 ,  H01H2085/0275 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  Y10T29/49107 ,  H01L2924/00

摘要： Structure providing more reliable fuse blow location, and method of making the same. A vertical metal fuse blow structure has, prior to fuse blow, an intentionally damaged portion of the fuse conductor. The damaged portion helps the fuse blow in a known location, thereby decreasing the resistance variability in post-blow circuits. At the same time, prior to fuse blow, the fuse structure is able to operate normally. The damaged portion of the fuse conductor is made by forming an opening in a cap layer above a portion of the fuse conductor, and etching the fuse conductor. Preferably, the opening is aligned such that the damaged portion is on the top corner of the fuse conductor. A cavity can be formed in the insulator adjacent to the damaged fuse conductor. The damaged fuse structure having a cavity can be easily incorporated in a process of making integrated circuits having air gaps.

摘要翻译： 提供更可靠的保险丝熔断位置的结构及其制作方法。 在熔断器熔断之前，垂直金属保险丝熔断结构在熔丝导体有意损坏的部分。 损坏的部分有助于熔断器在已知位置中熔断，从而降低后吹回路中的电阻变化。 同时，在保险丝熔断之前，保险丝结构能够正常工作。 熔丝导体的损坏部分是通过在保险丝导体的一部分上方的盖层中形成开口，并蚀刻熔丝导体而制成的。 优选地，开口对准，使得损坏部分在熔丝导体的顶角上。 可以在与损坏的保险丝导体相邻的绝缘体中形成空腔。 具有空腔的损坏的保险丝结构可以容易地结合在制造具有气隙的集成电路的过程中。

公开(公告)号：US20120326269A1

公开(公告)日：2012-12-27

申请号：US13165087

申请日：2011-06-21

申请人： GRISELDA BONILLA ,  Kaushik Chanda ,  Samuel S. Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon

发明人： GRISELDA BONILLA ,  Kaushik Chanda ,  Samuel S. Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon

IPC分类号： H01L23/525 ,  H01L21/768

CPC分类号： H01L23/5256 ,  H01L21/768 ,  H01L21/76808 ,  H01L21/76811 ,  H01L21/76813 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： E-fuse structures in back end of the line (BEOL) interconnects and methods of manufacture are provided. The method includes forming an interconnect via in a substrate in alignment with a first underlying metal wire and forming an e-fuse via in the substrate, exposing a second underlying metal wire. The method further includes forming a defect with the second underlying metal wire and filling the interconnect via with metal and in contact with the first underlying metal wire thereby forming an interconnect structure. The method further includes filling the e-fuse via with the metal and in contact with the defect and the second underlying metal wire thereby forming an e-fuse structure.

摘要翻译： 提供线后端的电熔丝结构（BEOL）互连和制造方法。 该方法包括在衬底中与第一底层金属线对齐形成互连通孔，并在衬底中形成电熔丝通孔，露出第二下面的金属线。 该方法还包括用第二底层金属线形成缺陷并用金属填充互连通孔并与第一底层金属线接触，从而形成互连结构。 该方法还包括用金属填充e熔丝通孔并与缺陷和第二下面的金属线接触，从而形成电熔丝结构。

公开(公告)号：US08138093B2

公开(公告)日：2012-03-20

申请号：US12539930

申请日：2009-08-12

申请人： Hakeem B. S. Akinmade-Yusuff ,  Samuel S. Choi

发明人： Hakeem B. S. Akinmade-Yusuff ,  Samuel S. Choi

IPC分类号： H01L21/311

CPC分类号： H01L21/31144 ,  H01L21/0335 ,  H01L21/3085 ,  H01L21/31138

摘要： A lithographic material stack including a photo-resist and an organic planarizing layer is combined with an etch process that generates etch residues over a wide region from sidewalls of etched regions. By selecting the etch chemistry that produces deposition of etch residues from the organic planarizing layer over a wide region, the etch residue generated at the sidewalls of the wide trench is deposited over the entire bottom surface of the wide trench. An etch residue portion remains at the bottom surface of the wide trench when the organic planarizing layer is etched through in the first trench region. The etch residue portion is employed in the next step of the etch process to retard the etch rate in the wide trench, thereby producing the same depth for all trenches in the material layer into which the pattern of the lithographic material stack is transferred.

摘要翻译： 包括光致抗蚀剂和有机平坦化层的平版印刷材料堆叠与在蚀刻区域的侧壁的宽区域上产生蚀刻残留物的蚀刻工艺组合。 通过选择在宽的区域上产生来自有机平坦化层的蚀刻残留物沉积的蚀刻化学物质，在宽沟槽的侧壁处产生的蚀刻残留物沉积在宽沟槽的整个底表面上。 当在第一沟槽区域中蚀刻有机平坦化层时，蚀刻残留部分保留在宽沟槽的底表面。 蚀刻残留部分用于蚀刻工艺的下一步骤以延迟宽沟槽中的蚀刻速率，从而为材料层中所有的平版印刷材料堆叠的图案被转移到其中的所有沟槽产生相同的深度。

公开(公告)号：US09093164B2

公开(公告)日：2015-07-28

申请号：US13298661

申请日：2011-11-17

申请人： Ronald G. Filippi ,  Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon

发明人： Ronald G. Filippi ,  Griselda Bonilla ,  Kaushik Chanda ,  Samuel S. Choi ,  Stephan Grunow ,  Naftali E. Lustig ,  Andrew H. Simon

IPC分类号： H01H85/04 ,  G11C17/16 ,  H01L23/525 ,  H01L23/522 ,  G11C29/00 ,  H01H85/46 ,  H01L23/532

CPC分类号： G11C17/16 ,  G11C29/702 ,  H01H2085/466 ,  H01L23/5226 ,  H01L23/5256 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal fuse structure using redundant vias formed on one metal level in a stacked via metal fuse structure to force failures to occur in the metal level that does not have the redundant vias. The metal fuse structure includes a first dielectric layer having a conductor, a second dielectric layer above the first dielectric layer having a first conductive line and a first via, the first via is on the conductor, the first conductive line is on the first via, the first via is the only electrical connection between the first conductive line and the conductor, and a third dielectric layer above the second dielectric layer having a second conductive line, a second via and a third via, the second via and the third via are both on the first conductive line, the second conductive line is on both the first via and the second via.

摘要翻译： 一种金属熔断器结构，其使用在堆叠的通孔金属熔丝结构中的一个金属层上形成的冗余通孔，以迫使在不具有冗余通孔的金属层中发生故障。 金属熔丝结构包括具有导体的第一电介质层，在第一电介质层之上的第二电介质层，具有第一导电线和第一通孔，第一通孔位于导体上，第一导电线在第一通孔上， 所述第一通孔是所述第一导线与所述导体之间的唯一电连接，并且所述第二电介质层上方的第三电介质层具有第二导电线，第二通孔和第三通孔，所述第二通孔和所述第三通孔均为 在第一导线上，第二导线在第一通孔和第二通孔上。

公开(公告)号：US09034664B2

公开(公告)日：2015-05-19

申请号：US13472555

申请日：2012-05-16

申请人： Griselda Bonilla ,  Junjing Bao ,  Samuel S. Choi ,  Ronald G. Filippi ,  Naftali E. Lustig ,  Andrew H. Simon

发明人： Griselda Bonilla ,  Junjing Bao ,  Samuel S. Choi ,  Ronald G. Filippi ,  Naftali E. Lustig ,  Andrew H. Simon

IPC分类号： H01L21/00 ,  H01L21/4763 ,  H01L21/44 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L21/76849 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/5283 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of repairing hollow metal void defects in interconnects and resulting structures. After polishing interconnects, hollow metal void defects become visible. The locations of the defects are largely predictable. A repair method patterns a mask material to have openings over the interconnects (and, sometimes, the adjacent dielectric layer) where defects are likely to appear. A local metal cap is formed in the mask openings to repair the defect. A dielectric cap covers the local metal cap and any recesses formed in the adjacent dielectric layer.

摘要翻译： 一种在互连和结构中修复空心金属空隙缺陷的方法。 抛光互连后，中空金属空隙缺陷变得可见。 缺陷的位置在很大程度上是可预测的。 修复方法将掩模材料图案化成可能出现缺陷的互连（和有时相邻的介电层）上的开口。 在掩模孔中形成局部金属盖，以修复缺陷。 电介质盖覆盖局部金属盖和形成在相邻电介质层中的任何凹陷。

公开(公告)号：US08736020B2

公开(公告)日：2014-05-27

申请号：US13608183

申请日：2012-09-10

申请人： Junjing Bao ,  Griselda Bonilla ,  Samuel S. Choi ,  Ronald G. Filippi ,  Naftali Eliahu Lustig ,  Andrew H. Simon

发明人： Junjing Bao ,  Griselda Bonilla ,  Samuel S. Choi ,  Ronald G. Filippi ,  Naftali Eliahu Lustig ,  Andrew H. Simon

IPC分类号： H01L23/52

CPC分类号： H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electronic anti-fuse structure, the structure including an Mx level comprising a first Mx metal and a second Mx metal, a dielectric layer located above the Mx level, an Mx+1 level located above the dielectric layer; and a metallic element in the dielectric layer and positioned between the first Mx metal and the second Mx metal, wherein the metallic element is insulated from both the first Mx metal and the second Mx metal.

摘要翻译： 一种电子反熔丝结构，该结构包括包含第一Mx金属和第二Mx金属的Mx级，位于Mx级上方的电介质层，位于介电层上方的Mx + 1级; 以及金属元件，位于所述第一Mx金属和所述第二Mx金属之间，所述金属元件与所述第一Mx金属和所述第二Mx金属绝缘。