公开(公告)号：US09105757B2

公开(公告)日：2015-08-11

申请号：US14040670

申请日：2013-09-28

申请人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

发明人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

IPC分类号： H01L29/872 ,  H01L29/66 ,  H01L29/868 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205

CPC分类号： H01L29/872 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66212

摘要： The present invention discloses a junction barrier Schottky (JBS) diode and a manufacturing method thereof. The JBS diode includes: an N-type gallium nitride (GaN) substrate; an aluminum gallium nitride (AlGaN) barrier layer, which is formed on the N-type GaN substrate; a P-type gallium nitride (GaN) layer, which is formed on or above the N-type GaN substrate; an anode conductive layer, which is formed at least partially on the AlGaN barrier layer, wherein a Schottky contact is formed between part of the anode conductive layer and the AlGaN barrier layer; and a cathode conductive layer, which is formed on the N-type GaN substrate, wherein an ohmic contact is formed between the cathode conductive layer and the N-type GaN substrate, and the cathode conductive layer is not directly connected to the anode conductive layer.

摘要翻译： 本发明公开了一种接合势垒肖特基（JBS）二极管及其制造方法。 JBS二极管包括：N型氮化镓（GaN）衬底; 形成在N型GaN衬底上的氮化镓铝（AlGaN）阻挡层; 在N型GaN衬底上形成的P型氮化镓（GaN）层; 至少部分地形成在AlGaN阻挡层上的阳极导电层，其中在所述阳极导电层的一部分和所述AlGaN阻挡层之间形成肖特基接触; 以及阴极导电层，其形成在N型GaN衬底上，其中在阴极导电层和N型GaN衬底之间形成欧姆接触，并且阴极导电层不直接连接到阳极导电层 。

公开(公告)号：US09362381B2

公开(公告)日：2016-06-07

申请号：US14971496

申请日：2015-12-16

申请人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

发明人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

IPC分类号： H01L29/66 ,  H01L29/73 ,  H01L29/10 ,  H01L29/20 ,  H01L29/201 ,  H01L27/07

CPC分类号： H01L29/66325 ,  H01L27/0722 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.

摘要翻译： 本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极 形成在GaN衬底上。 第一GaN层形成在GaN衬底上并且具有垂直于GaN衬底的侧壁。 第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。 第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。 门具有在横向方向上与侧壁相邻的侧板以控制通道。

公开(公告)号：US20160111519A1

公开(公告)日：2016-04-21

申请号：US14971496

申请日：2015-12-16

申请人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

发明人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

IPC分类号： H01L29/66 ,  H01L27/07 ,  H01L29/201 ,  H01L29/10 ,  H01L29/20

CPC分类号： H01L29/66325 ,  H01L27/0722 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.

摘要翻译： 本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极 形成在GaN衬底上。 第一GaN层形成在GaN衬底上并具有垂直于GaN衬底的侧壁。 第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。 第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。 门具有在横向方向上与侧壁相邻的侧板以控制通道。

公开(公告)号：US09252219B2

公开(公告)日：2016-02-02

申请号：US14464220

申请日：2014-08-20

申请人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

发明人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

IPC分类号： H01L29/73 ,  H01L29/66 ,  H01L29/20 ,  H01L29/423 ,  H01L29/778

CPC分类号： H01L29/66325 ,  H01L27/0722 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.

摘要翻译： 本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极 形成在GaN衬底上。 第一GaN层形成在GaN衬底上并具有垂直于GaN衬底的侧壁。 第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。 第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。 门具有在横向方向上与侧壁相邻的侧板以控制通道。

公开(公告)号：US08710551B2

公开(公告)日：2014-04-29

申请号：US13597599

申请日：2012-08-29

申请人： Chih-Fang Huang ,  Chien-Wei Chiu ,  Ting-Fu Chang ,  Tsung-Yu Yang ,  Tsung-Yi Huang

发明人： Chih-Fang Huang ,  Chien-Wei Chiu ,  Ting-Fu Chang ,  Tsung-Yu Yang ,  Tsung-Yi Huang

IPC分类号： H01L31/109 ,  H01L31/072

CPC分类号： H01L29/66462 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7787

摘要： The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides of the gate respectively, wherein each bandgap of the semiconductor layer, the barrier layer, and the piezoelectric layer partially but not entirely overlaps the other two bandgaps. The gate is formed for receiving a gate voltage. A two dimensional electron gas (2DEG) is formed in a portion of a junction between the semiconductor layer and the barrier layer but not below at least a portion of the piezoelectric layer, wherein the 2DEG is electrically connected to the source and the drain.

摘要翻译： 本发明公开了一种高电子迁移率晶体管（HEMT）及其制造方法。 HEMT包括半导体层，半导体层上的势垒层，阻挡层上的压电层，压电层上的栅极，栅极两侧的源极和漏极，其中半导体的每个带隙 层，阻挡层和压电层部分但不完全与其它两个带隙重叠。 栅极形成为用于接收栅极电压。 二维电子气体（2DEG）形成在半导体层和阻挡层之间的结的一部分中，但不在压电层的至少一部分下方，其中2DEG电连接到源极和漏极。

公开(公告)号：US20150084060A1

公开(公告)日：2015-03-26

申请号：US14464220

申请日：2014-08-20

申请人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

发明人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

IPC分类号： H01L29/73 ,  H01L29/66 ,  H01L29/20

CPC分类号： H01L29/66325 ,  H01L27/0722 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention discloses an insulated gate bipolar transistor (IGBT) and a manufacturing method thereof. The IGBT includes: a gallium nitride (GaN) substrate, a first GaN layer with a first conductive type, a second GaN layer with a first conductive type, a third GaN layer with a second conductive type or an intrinsic conductive type, and a gate formed on the GaN substrate. The first GaN layer is formed on the GaN substrate and has a side wall vertical to the GaN substrate. The second GaN layer is formed on the GaN substrate and is separated from the first GaN layer by the gate. The third GaN layer is formed on the first GaN layer and is separated from the GaN substrate by the first GaN layer. The gate has a side plate adjacent to the side wall in a lateral direction to control a channel.

摘要翻译： 本发明公开了一种绝缘栅双极晶体管（IGBT）及其制造方法。 IGBT包括：氮化镓（GaN）衬底，具有第一导电类型的第一GaN层，具有第一导电类型的第二GaN层，具有第二导电类型或本征导电类型的第三GaN层，以及栅极 形成在GaN衬底上。 第一GaN层形成在GaN衬底上并具有垂直于GaN衬底的侧壁。 第二GaN层形成在GaN衬底上，并通过栅极与第一GaN层分离。 第三GaN层形成在第一GaN层上，并通过第一GaN层与GaN衬底分离。 门具有在横向方向上与侧壁相邻的侧板以控制通道。

公开(公告)号：US08981429B2

公开(公告)日：2015-03-17

申请号：US13898374

申请日：2013-05-20

申请人： Chih-Fang Huang ,  Po-Chin Peng ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  K. C. Chang ,  Hung-Der Su ,  Chien-Wei Chiu ,  Tsung-Yi Huang ,  Tsung-Yu Yang ,  Ting-Fu Chang

发明人： Chih-Fang Huang ,  Po-Chin Peng ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  K. C. Chang ,  Hung-Der Su ,  Chien-Wei Chiu ,  Tsung-Yi Huang ,  Tsung-Yu Yang ,  Ting-Fu Chang

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L29/20

CPC分类号： H01L29/66462 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/66431 ,  H01L29/7789

摘要： The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT device includes: a substrate, a first gallium nitride (GaN) layer; a P-type GaN layer, a second GaN layer, a barrier layer, a gate, a source, and a drain. The first GaN layer is formed on the substrate, and has a stepped contour from a cross-section view. The P-type GaN layer is formed on an upper step surface of the stepped contour, and has a vertical sidewall. The second GaN layer is formed on the P-type GaN layer. The barrier layer is formed on the second GaN layer. two dimensional electron gas regions are formed at junctions between the barrier layer and the first and second GaN layers. The gate is formed on an outer side of the vertical sidewall.

摘要翻译： 本发明公开了一种高电子迁移率晶体管（HEMT）及其制造方法。 HEMT器件包括：衬底，第一氮化镓（GaN）层; P型GaN层，第二GaN层，势垒层，栅极，源极和漏极。 第一GaN层形成在基板上，并且具有从横截面视图的阶梯状轮廓。 P型GaN层形成在阶梯状轮廓的上台阶面上，具有垂直侧壁。 第二GaN层形成在P型GaN层上。 阻挡层形成在第二GaN层上。 在阻挡层与第一和第二GaN层之间的接合处形成二维电子气体区域。 门形成在垂直侧壁的外侧。

公开(公告)号：US20140159048A1

公开(公告)日：2014-06-12

申请号：US13898374

申请日：2013-05-20

申请人： Chih-Fang Huang ,  Po-Chin Peng ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  K.C. Chang ,  Hung-Der Su ,  Chien-Wei Chiu ,  Tsung-Yi Huang ,  Tsung-Yu Yang ,  Ting-Fu Chang

发明人： Chih-Fang Huang ,  Po-Chin Peng ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  K.C. Chang ,  Hung-Der Su ,  Chien-Wei Chiu ,  Tsung-Yi Huang ,  Tsung-Yu Yang ,  Ting-Fu Chang

IPC分类号： H01L29/778

CPC分类号： H01L29/66462 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/66431 ,  H01L29/7789

摘要： The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT device includes: a substrate, a first gallium nitride (GaN) layer; a P-type GaN layer, a second GaN layer, a barrier layer, a gate, a source, and a drain. The first GaN layer is formed on the substrate, and has a stepped contour from a cross-section view. The P-type GaN layer is formed on an upper step surface of the stepped contour, and has a vertical sidewall. The second GaN layer is formed on the P-type GaN layer. The barrier layer is formed on the second GaN layer. two dimensional electron gas regions are formed at junctions between the barrier layer and the first and second GaN layers. The gate is formed on an outer side of the vertical sidewall.

摘要翻译： 本发明公开了一种高电子迁移率晶体管（HEMT）及其制造方法。 HEMT器件包括：衬底，第一氮化镓（GaN）层; P型GaN层，第二GaN层，势垒层，栅极，源极和漏极。 第一GaN层形成在基板上，并且具有从横截面视图的阶梯状轮廓。 P型GaN层形成在阶梯状轮廓的上台阶面上，具有垂直侧壁。 第二GaN层形成在P型GaN层上。 阻挡层形成在第二GaN层上。 在阻挡层与第一和第二GaN层之间的接合处形成二维电子气体区域。 门形成在垂直侧壁的外侧。

公开(公告)号：US20150021615A1

公开(公告)日：2015-01-22

申请号：US14040670

申请日：2013-09-28

申请人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

发明人： Chih-Fang Huang ,  Tsung-Yi Huang ,  Chien-Wei Chiu ,  Tsung-Yu Yang ,  Ting-Fu Chang ,  Tsung-Chieh Hsiao ,  Ya-Hsien Liu ,  Po-Chin Peng

IPC分类号： H01L29/872 ,  H01L29/66 ,  H01L29/868

CPC分类号： H01L29/872 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66212

摘要： The present invention discloses a junction barrier Schottky (JBS) diode and a manufacturing method thereof. The JBS diode includes: an N-type gallium nitride (GaN) substrate; an aluminum gallium nitride (AlGaN) barrier layer, which is formed on the N-type GaN substrate; a P-type gallium nitride (GaN) layer, which is formed on or above the N-type GaN substrate; an anode conductive layer, which is formed at least partially on the AlGaN barrier layer, wherein a Schottky contact is formed between part of the anode conductive layer and the AlGaN barrier layer; and a cathode conductive layer, which is formed on the N-type GaN substrate, wherein an ohmic contact is formed between the cathode conductive layer and the N-type GaN substrate, and the cathode conductive layer is not directly connected to the anode conductive layer.

摘要翻译： 本发明公开了一种接合势垒肖特基（JBS）二极管及其制造方法。 JBS二极管包括：N型氮化镓（GaN）衬底; 形成在N型GaN衬底上的氮化镓铝（AlGaN）阻挡层; 在N型GaN衬底上形成的P型氮化镓（GaN）层; 至少部分地形成在AlGaN阻挡层上的阳极导电层，其中在所述阳极导电层的一部分和所述AlGaN阻挡层之间形成肖特基接触; 以及阴极导电层，其形成在N型GaN衬底上，其中在阴极导电层和N型GaN衬底之间形成欧姆接触，并且阴极导电层不直接连接到阳极导电层 。

公开(公告)号：US20140187003A1

公开(公告)日：2014-07-03

申请号：US14201891

申请日：2014-03-09

申请人： Chih-Fang Huang ,  Chien-Wei Chiu ,  Ting-Fu Chang ,  Tsung-Yu Yang ,  Tsung-Yi Huang

发明人： Chih-Fang Huang ,  Chien-Wei Chiu ,  Ting-Fu Chang ,  Tsung-Yu Yang ,  Tsung-Yi Huang

IPC分类号： H01L29/66

CPC分类号： H01L29/66462 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7787

摘要： The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides of the gate respectively, wherein each bandgap of the semiconductor layer, the barrier layer, and the piezoelectric layer partially but not entirely overlaps the other two bandgaps. The gate is formed for receiving a gate voltage. A two dimensional electron gas (2DEG) is formed in a portion of a junction between the semiconductor layer and the barrier layer but not below at least a portion of the piezoelectric layer, wherein the 2DEG is electrically connected to the source and the drain.