摘要:
A sigma-delta modulation sensing circuit and an analog-to-digital converter for an imager that eliminate the erroneous conversion of non-zero analog voltages to zero digital voltages is provided. The sensing circuit includes an offset branch that allows input of an offset voltage that is at least as large as a negative channel-specific offset found in a pixel signal voltage. The sensing circuit also includes a regulation branch based on a reference voltage common across multiple columns of an imager. The regulation branch has an adjustable resistance that is modulated during the sensing operation, which creates an adjustment current that is applied during the sensing operation to a reset signal. The sensing circuit and analog-to-digital converter generate digital code based on the difference between the reset voltage and the summed offset and pixel signal voltage.
摘要:
A method, apparatus and system are disclosed for digitizing a plurality of analog pixel signals of a pixel array in a manner which produces a digital signal representing the combination of said plurality of analog pixel signals. A readout architecture performs at least some binning and/or scaling operations in the readout and analog to digital conversion circuits relieving an image processor from the task of performing these operations.
摘要:
A column circuitry architecture for an imager includes redundant column or row circuits. The column or row circuitry includes a number of redundant column or row circuits. Each column or row circuit include circuitry for controllably coupling the column or row circuit to one of plural signal lines from an array of pixels. A control mechanism is used to select a configuration of plural column or row circuits in the column or row circuitry. In this manner, some column or row circuits are decoupled from the pixel in favor of other column or row circuits. The decoupled column or row circuits may include defective or noisy circuits.
摘要:
An improved passive pixel sensor (PPS) circuit comprising a correlated sampling circuit and method that integrates pixel charge leakage onto an integrating amplifier during sampling periods. An integrator circuit is provided for integrating PPS pixel charges received via a column line, and correlated sampling circuit is provided for the removal of kTC noise and dark integration. A multi-point sampling of the output of the integrator is provided wherein at least a first and second correlated sample are used to detect the charge integration from the column line leakages, and at least a third sample is used to detect the PPS signal after pixel readout. The correlated sampling method is employed to remove kTC noise and dark integration from the PPS signal.
摘要:
A sigma-delta modulation sensing circuit and an analog-to-digital converter for an imager that eliminate the erroneous conversion of non-zero analog voltages to zero digital voltages is provided. The sensing circuit includes an offset branch that allows input of an offset voltage that is at least as large as a negative channel-specific offset found in a pixel signal voltage. The sensing circuit also includes a regulation branch based on a reference voltage common across multiple columns of an imager. The regulation branch has an adjustable resistance that is modulated during the sensing operation, which creates an adjustment current that is applied during the sensing operation to a reset signal. The sensing circuit and analog-to-digital converter generate digital code based on the difference between the reset voltage and the summed offset and pixel signal voltage.
摘要:
A pixel circuit that partially incorporates an associated column amplifier into the pixel circuitry. By incorporating part of a mirrored amplifier into the pixel, noise from the pixel is reduced.
摘要:
A method, apparatus and system are disclosed for digitizing a plurality of analog pixel signals of a pixel array in a manner which produces a digital signal representing the combination of said plurality of analog pixel signals. A readout architecture performs at least some binning and/or scaling operations in the readout and analog to digital conversion circuits relieving an image processor from the task of performing these operations.
摘要:
A static random access memory (SRAM) cell having an inverter and a tri-state inverter. An input of the inverter is coupled to an output of the tri-state inverter and an output of the inverter is coupled to an input of the tri-state inverter. The tri-state inverter has an enable node to which a read signal is applied and is configured to generate an output signal that is the complement of an input signal in response to an active read signal. The SRAM cell further includes an access transistor having a first node coupled to the output of the tri-state inverter and having a second node coupled to the digit line. The access transistor is configured to couple the first and second nodes in response to an active access signal applied to its gate.
摘要:
An improved analog-to-digital converter wherein a minimal amount of circuitry is provided for conversion of an analog signal to a series of digital bits. A comparator is provided for generating digital values to which the digital bits correspond. A digital-to-analog converter is provided for generating, via successive approximation, a feedback analog signal based on bits previously generated by the comparator. The analog-to-digital converter compares the feedback analog signal to the input analog signal, and based on the comparison generates a digital value that corresponds to a digital bit. In the method of the invention, an analog signal is converted to a digital value using the analog-to-digital converter, and a digital-to-analog converter comprising two capacitors and a reference selector generates, via successive approximation, a feedback analog signal that is applied to a comparator for comparison to the input analog signal being digitized.
摘要:
An analog to digital conversion circuit includes a voltage-to-charge converter coupled to a charge integrator and a comparator. The voltage-to-charge converter is coupled to, and converts the voltage of, an analog signal or one of a set of reference voltages, into an equivalent charge. The charge integrator then adds or subtracts that equivalent charge in an iterative manner based on an output of the comparator. The initial charge of the charge integrator is based on a previous conversion. When plural analog to digital conversion circuits are used the initial charge in each such circuit may be different, as each initial charge serves to automatically compensate for any offset in the output of the circuit.