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1.发明授权Eliminating metal-rich silicides using an amorphous Ni alloy silicide structure 失效使用非晶Ni合金硅化物结构消除富含金属的硅化物公开(公告)号：US07786578B2
公开(公告)日：2010-08-31
申请号：US12105037
申请日：2008-04-17
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
摘要翻译： 本发明提供了一种用于生产薄镍（Ni）一硅化物或NiSi膜（具有约30nm以下的厚度）的方法，作为在退火过程中形成非晶Ni合金硅化物层的CMOS器件中的接触，其消除 （即完全旁路）形成富金属硅化物层。 通过消除富金属硅化物层的形成，与由富金属硅化物相形成的NiSi膜相比，形成的所得NiSi膜具有改善的表面粗糙度。 本发明的方法还形成Ni单硅化物膜，而不会在现有技术的NiSi膜中存在的含Si衬底内遇到掺杂剂类型浓度的任何依赖性。
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公开(公告)号：US07732870B2
公开(公告)日：2010-06-08
申请号：US12105034
申请日：2008-04-17
IPC分类号： H01L29/78
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
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3.发明申请ELIMINATING METAL-RICH SILICIDES USING AN AMORPHOUS Ni ALLOY SILICIDE STRUCTURE 有权使用非晶态Ni合金硅氧烷结构消除金属硅氧烷公开(公告)号：US20080217780A1
公开(公告)日：2008-09-11
申请号：US12105034
申请日：2008-04-17
IPC分类号： H01L23/498
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
摘要翻译： 本发明提供了一种用于生产薄镍（Ni）一硅化物或NiSi膜（具有约30nm以下的厚度）的方法，作为在退火过程中形成非晶Ni合金硅化物层的CMOS器件中的接触，其消除 （即完全旁路）形成富金属硅化物层。 通过消除富金属硅化物层的形成，与由富金属硅化物相形成的NiSi膜相比，形成的所得NiSi膜具有改善的表面粗糙度。 本发明的方法还形成Ni单硅化物膜，而不会在现有技术的NiSi膜中存在的含Si衬底内遇到掺杂剂类型浓度的任何依赖性。
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公开(公告)号：US20080217781A1
公开(公告)日：2008-09-11
申请号：US12105037
申请日：2008-04-17
IPC分类号： H01L23/498
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
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5.发明授权Eliminating metal-rich silicides using an amorphous Ni alloy silicide structure 有权使用非晶Ni合金硅化物结构消除富含金属的硅化物公开(公告)号：US07419907B2
公开(公告)日：2008-09-02
申请号：US11173038
申请日：2005-07-01
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
摘要翻译： 本发明提供了一种用于生产薄镍（Ni）一硅化物或NiSi膜（具有约30nm以下的厚度）的方法，作为在退火过程中形成非晶Ni合金硅化物层的CMOS器件中的接触，其消除 （即完全旁路）形成富金属硅化物层。 通过消除富金属硅化物层的形成，与由富金属硅化物相形成的NiSi膜相比，形成的所得NiSi膜具有改善的表面粗糙度。 本发明的方法还形成Ni单硅化物膜，而不会在现有技术的NiSi膜中存在的含Si衬底内遇到掺杂剂类型浓度的任何依赖性。
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6.发明申请Eliminating metal-rich silicides using an amorphous Ni alloy silicide structure 有权使用非晶Ni合金硅化物结构消除富含金属的硅化物公开(公告)号：US20070004205A1
公开(公告)日：2007-01-04
申请号：US11173038
申请日：2005-07-01
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/2855
摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.
摘要翻译： 本发明提供了一种用于生产薄镍（Ni）一硅化物或NiSi膜（具有约30nm以下的厚度）的方法，作为在退火过程中形成非晶Ni合金硅化物层的CMOS器件中的接触，其消除 （即完全旁路）形成富金属硅化物层。 通过消除富金属硅化物层的形成，与由富金属硅化物相形成的NiSi膜相比，形成的所得NiSi膜具有改善的表面粗糙度。 本发明的方法还形成Ni单硅化物膜，而不会在现有技术的NiSi膜中存在的含Si衬底内遇到掺杂剂类型浓度的任何依赖性。
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7.发明授权公开(公告)号：US07927895B1
公开(公告)日：2011-04-19
申请号：US12574118
申请日：2009-10-06
IPC分类号： H01L21/00
CPC分类号： H01L22/20 , G01R31/2884 , G01R31/307 , H01L22/12 , H01L22/14 , H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A method for determining resistances of defects in a test structure, comprising: forming a first layer of the test structure having elements under test; generating a first e-beam image of the first layer, the first e-beam image graphically identifying defects detected at the first layer, each defect at the first layer having a corresponding grey scale level; adding capacitance to the structure by forming a metal layer of the structure; generating a second e-beam image of the metal layer, the second e-beam image graphically identifying defects detected at the metal layer, each defect at the metal layer having a corresponding grey scale level; generating a pattern of grey scale levels for each defect based on the corresponding grey scale level of each defect at each layer of the test structure; and determining a resistive range of each defect based on the pattern of grey scale levels generated for each defect.
摘要翻译： 一种确定测试结构中的缺陷电阻的方法，包括：形成具有被测元件的测试结构的第一层; 产生第一层的第一电子束图像，第一电子束图像以图形方式识别在第一层处检测到的缺陷，第一层处的每个缺陷具有相应的灰度级; 通过形成结构的金属层向结构增加电容; 产生所述金属层的第二电子束图像，所述第二电子束图像以图形方式识别在所述金属层处检测到的缺陷，所述金属层处的每个缺陷具有相应的灰度级; 基于测试结构的每个层处的每个缺陷的相应灰度级产生针对每个缺陷的灰度级的图案; 以及基于为每个缺陷生成的灰度级的图案来确定每个缺陷的电阻范围。
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8.发明申请公开(公告)号：US20110080180A1
公开(公告)日：2011-04-07
申请号：US12574118
申请日：2009-10-06
CPC分类号： H01L22/20 , G01R31/2884 , G01R31/307 , H01L22/12 , H01L22/14 , H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A method for determining resistances of defects in a test structure, comprising: forming a first layer of the test structure having elements under test; generating a first e-beam image of the first layer, the first e-beam image graphically identifying defects detected at the first layer, each defect at the first layer having a corresponding grey scale level; adding capacitance to the structure by forming a metal layer of the structure; generating a second e-beam image of the metal layer, the second e-beam image graphically identifying defects detected at the metal layer, each defect at the metal layer having a corresponding grey scale level; generating a pattern of grey scale levels for each defect based on the corresponding grey scale level of each defect at each layer of the test structure; and determining a resistive range of each defect based on the pattern of grey scale levels generated for each defect.
摘要翻译： 一种确定测试结构中的缺陷电阻的方法，包括：形成具有被测元件的测试结构的第一层; 产生第一层的第一电子束图像，第一电子束图像以图形方式识别在第一层处检测到的缺陷，第一层处的每个缺陷具有相应的灰度级; 通过形成结构的金属层向结构增加电容; 产生所述金属层的第二电子束图像，所述第二电子束图像以图形方式识别在所述金属层处检测到的缺陷，所述金属层处的每个缺陷具有相应的灰度级; 基于测试结构的每个层处的每个缺陷的相应灰度级产生针对每个缺陷的灰度级的图案; 以及基于为每个缺陷生成的灰度级的图案来确定每个缺陷的电阻范围。
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公开(公告)号：US08772161B2
公开(公告)日：2014-07-08
申请号：US13205063
申请日：2011-08-08
IPC分类号： H01L21/44
CPC分类号： H01L29/665 , H01L21/28518 , H01L21/76828 , H01L21/76886 , H01L21/823814 , H01L21/823842 , H01L21/823871 , H01L21/84 , H01L27/1203
摘要： A method for modifying the chemistry or microstructure of silicon-based technology via an annealing process is provided. The method includes depositing a reactive material layer within a selected proximity to an interconnect, igniting the reactive material layer, and annealing the interconnect via heat transferred from the ignited reactive material layer. The method can also be implemented in connection with a silicide/silicon interface as well as a zone of silicon-based technology.
摘要翻译： 提供了一种通过退火工艺改性硅基技术的化学或微结构的方法。 该方法包括将反应性材料层沉积在选定的互连附近，点燃反应性材料层，以及通过从点燃的反应性材料层传递的热量使互连件退火。 该方法还可以结合硅化物/硅界面以及硅基技术的区域来实现。
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10.发明申请METHOD AND STRUCTURE FOR REDUCING CONTACT RESISTANCE BETWEEN SILICIDE CONTACT AND OVERLYING METALLIZATION 有权减少硅化物接触和金属化之间的接触电阻的方法和结构公开(公告)号：US20080211100A1
公开(公告)日：2008-09-04
申请号：US12122984
申请日：2008-05-19
IPC分类号： H01L21/768 , H01L23/48
CPC分类号： H01L23/485 , H01L21/28518 , H01L21/76877 , H01L21/76883 , H01L23/53209 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A semiconductor structure in which the contact resistance in the contact opening is reduced as well as a method of forming the same are provided. This is achieved in the present invention by replacing conventional contact metallurgy, such as tungsten, or a metal silicide, such as Ni silicide or Cu silicide, with a metal germanide-containing contact material. The term “metal germanide-containing” is used in the present application to denote a pure metal germanide (i.e., MGe alloy) or a metal germanide that includes Si (i.e., MSiGe alloy).
摘要翻译： 提供了其中接触开口中的接触电阻降低的半导体结构及其形成方法。 这在本发明中通过用含金属锗化物的接触材料代替常规的接触冶金例如钨或金属硅化物，例如硅化镍或硅化铜，来实现。 在本申请中使用的术语“含金属锗”表示纯金属锗（即MGe合金）或包含Si（即，MSiGe合金）的金属锗化物。
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