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1.发明授权Affordable high performance high frequency multichip module fabrication and apparatus 有权负担得起的高性能高频多芯片模块制造和设备公开(公告)号：US07952196B1
公开(公告)日：2011-05-31
申请号：US12106805
申请日：2008-04-21
IPC分类号： H01L23/34
CPC分类号： H01L23/36 , H01L21/563 , H01L23/3107 , H01L23/373 , H01L23/5389 , H01L23/66 , H01L25/0652 , H01L25/18 , H01L2223/6605 , H01L2223/6622 , H01L2224/1134 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2924/01079 , H01L2924/09701 , H01L2924/1461 , H01L2924/1627 , H01L2924/19051 , H01L2924/3011 , H01L2924/00
摘要： An interconnect assembly for use in high frequency applications includes an interconnect structure, a plurality of electronic die disposed on the interconnect structure, and an encapsulant at least partially surrounding the plurality of electronic die. The interconnect structure includes a plurality of layers. The interconnect assembly further includes a thermal management layer disposed within a portion of the encapsulant and proximate to the plurality of electronic die and a controlled impedance interconnect connected to the interconnect structure and extending to a peripheral surface of the interconnect assembly.
摘要翻译： 用于高频应用的互连组件包括互连结构，布置在互连结构上的多个电子管芯以及至少部分围绕多个电子管芯的密封剂。 互连结构包括多个层。 互连组件还包括设置在密封剂的一部分内并且靠近多个电子管芯的热管理层和连接到互连结构并延伸到互连组件的外围表面的受控阻抗互连。
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公开(公告)号：US07727808B2
公开(公告)日：2010-06-01
申请号：US12138553
申请日：2008-06-13
IPC分类号： H01L21/00
CPC分类号： H01L24/24 , H01L21/6835 , H01L23/49827 , H01L23/5389 , H01L24/82 , H01L2224/24226 , H01L2224/2518 , H01L2224/82039 , H01L2924/01006 , H01L2924/01015 , H01L2924/01032 , H01L2924/01033 , H01L2924/19041 , H01L2924/19043
摘要： A method for forming an ultra thin die electronic package includes disposing a first polymer film on a first substrate, applying a first adhesive layer to the first polymer film, disposing at least one die on the first adhesive layer, disposing a second polymer film on at least one additional substrate, applying a second adhesive layer to the second polymer film on at least one additional substrate, applying a second adhesive layer to the second polymer film, and attaching the first substrate and the at least one additional substrate via the first adhesive layer and the second adhesive layer such that the at least one die is interspersed between. The method also includes forming multiple vias on a top and/or bottom side of the first and the additional substrate(s), wherein the multiple vias are directly connected to the die, and forming an electrical interconnection between the first substrate, the at least one additional substrate and a die pad of the at least one die.
摘要翻译： 一种形成超薄管芯电子封装的方法，包括在第一衬底上设置第一聚合物膜，向第一聚合物膜施加第一粘合剂层，在第一粘合剂层上设置至少一个管芯，将第二聚合物膜设置在 至少一个附加基底，在至少一个附加基底上向第二聚合物膜施加第二粘合剂层，将第二粘合剂层施加到第二聚合物膜，以及经由第一粘合剂层附着第一基底和至少一个另外的基底 以及所述第二粘合剂层，使得所述至少一个管芯分散在其间。 该方法还包括在第一和另外的衬底的顶部和/或底部上形成多个通孔，其中多个通孔直接连接到管芯，并且在第一衬底之间形成电互连，至少 一个另外的衬底和至少一个管芯的管芯焊盘。
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公开(公告)号：US20090309241A1
公开(公告)日：2009-12-17
申请号：US12138553
申请日：2008-06-13
CPC分类号： H01L24/24 , H01L21/6835 , H01L23/49827 , H01L23/5389 , H01L24/82 , H01L2224/24226 , H01L2224/2518 , H01L2224/82039 , H01L2924/01006 , H01L2924/01015 , H01L2924/01032 , H01L2924/01033 , H01L2924/19041 , H01L2924/19043
摘要： A method for forming an ultra thin die electronic package is provided. The method includes disposing a first polymer film on a first substrate. The method also includes applying a first adhesive layer to the first polymer film on the first substrate. The method further includes disposing at least one die on the first adhesive layer on the first substrate. The method also includes disposing a second polymer film on at least one additional substrate. The method further includes applying a second adhesive layer to the second polymer film on the at least one additional substrate. The method further includes attaching the first substrate and the at least one additional substrate via the first adhesive layer and the second adhesive layer such that the at least one die is interspersed between. The method also includes forming multiple vias on at least one of a top side, and at least one of a bottom side of the first and the at least one additional substrate, wherein the multiple vias are attached to the die. The method further includes forming an electrical interconnection between the first substrate, the at least one additional substrate and a die pad of the at least one die.
摘要翻译： 提供一种形成超薄模具电子封装的方法。 该方法包括在第一衬底上设置第一聚合物膜。 该方法还包括将第一粘合剂层施加到第一基底上的第一聚合物膜上。 该方法还包括在第一衬底上的第一粘合剂层上设置至少一个管芯。 该方法还包括在至少一个另外的基底上设置第二聚合物膜。 该方法还包括将第二粘合剂层施加到至少一个附加基底上的第二聚合物膜上。 该方法还包括经由第一粘合剂层和第二粘合剂层附接第一基底和至少一个另外的基底，使得至少一个管芯分散在其间。 该方法还包括在第一和至少一个附加基底的顶侧和至少之一中的至少一个上形成多个通孔，其中多个通孔连接到管芯。 该方法还包括在第一基板，至少一个附加基板和至少一个管芯的管芯焊盘之间形成电互连。
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4.发明申请公开(公告)号：US20090103160A1
公开(公告)日：2009-04-23
申请号：US11876070
申请日：2007-10-22
CPC分类号： G02F1/0123 , G02F1/2255 , H01L24/16 , H01L24/80 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/14 , H01L2924/1423 , H01L2924/15787 , H01L2924/00
摘要： An integrated electro-optical module apparatus includes in one embodiment an optical modulator configured to modulate an input optical signal coupled thereto; and a control circuit assembly configured to provide electrical control signals to the optical modulator to modulate the input optical signal; wherein the control circuit assembly is attached to the optical modulator in a stacked arrangement.
摘要翻译： 集成电光模块装置包括在一个实施例中，配置成调制与其耦合的输入光信号的光调制器; 以及控制电路组件，被配置为向所述光调制器提供电控制信号以调制所述输入光信号; 其中所述控制电路组件以堆叠布置附接到所述光学调制器。
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5.发明授权公开(公告)号：US07633667B2
公开(公告)日：2009-12-15
申请号：US11876070
申请日：2007-10-22
IPC分类号： G02F1/07
CPC分类号： G02F1/0123 , G02F1/2255 , H01L24/16 , H01L24/80 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/14 , H01L2924/1423 , H01L2924/15787 , H01L2924/00
摘要： An integrated electro-optical module apparatus includes in one embodiment an optical modulator configured to modulate an input optical signal coupled thereto; and a control circuit assembly configured to provide electrical control signals to the optical modulator to modulate the input optical signal; wherein the control circuit assembly is attached to the optical modulator in a stacked arrangement.
摘要翻译： 集成电光模块装置包括在一个实施例中，配置成调制与其耦合的输入光信号的光调制器; 以及控制电路组件，被配置为向所述光调制器提供电控制信号以调制所述输入光信号; 其中所述控制电路组件以堆叠布置附接到所述光学调制器。
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公开(公告)号：US07605466B2
公开(公告)日：2009-10-20
申请号：US11872562
申请日：2007-10-15
申请人： Marco Francesco Aimi , Christopher James Kapusta , Arun Virupaksha Gowda , David Cecil Hays , Oliver Charles Boomhower , Glenn Scott Claydon , Joseph Alfred Iannotti , Christopher Fred Keimel
发明人： Marco Francesco Aimi , Christopher James Kapusta , Arun Virupaksha Gowda , David Cecil Hays , Oliver Charles Boomhower , Glenn Scott Claydon , Joseph Alfred Iannotti , Christopher Fred Keimel
IPC分类号： H01L23/34
CPC分类号： B81C1/00269 , B81C2203/0118 , B81C2203/019 , B81C2203/032 , H01L2224/16225 , H01L2924/1461 , H01L2924/00
摘要： Multiple microelectromechanical systems (MEMS) on a substrate are capped with a cover using a layer that may function as a bonding agent, separation layer, and hermetic seal. A substrate has a first side with multiple MEMS devices. A cover is formed with through-holes for vias, and with standoff posts for layer registration and separation. An adhesive sheet is patterned with cutouts for the MEMS devices, vias, and standoff posts. The adhesive sheet is tacked to the cover, then placed on the MEMS substrate and heated to bond the layers. The via holes may be metalized with leads for circuit board connection. The MEMS units may be diced from the substrate after sealing, thus protecting them from contaminants.
摘要翻译： 衬底上的多个微电子机械系统（MEMS）用盖子盖住，使用可用作粘合剂，分离层和气密密封的层。 衬底具有具有多个MEMS器件的第一侧。 形成有用于通孔的通孔的盖，并且具有用于层对准和分离的支柱。 图案化粘合片用于MEMS器件，通孔和支柱的切口。 将粘合片粘合到盖上，然后放置在MEMS基板上并加热以粘合层。 通孔可以用电路板连接的引线金属化。 在密封之后，MEMS单元可以从基底切割，从而保护它们免受污染。
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公开(公告)号：US07570133B1
公开(公告)日：2009-08-04
申请号：US11634107
申请日：2006-12-06
摘要： A true time delay (“TTD”) system with wideband passive amplitude compensation is provided. The TTD system includes an input switch, an output switch, a reference delay line disposed between the input switch and the output switch, and time delay lines disposed between the input switch and the output switch. Each time delay line (“TDL”) has a different line length, and includes a center conductor between two corresponding ground planes. Each center conductor has a width and is separated from the two corresponding ground planes by a gap space. For each TDL, the width of the center conductor is configured such that a loss of the TDL is substantially the same as a loss of every other TDL over a range of operating frequencies. For each TDL, the gap space is configured such that an impedance of the TDL is substantially the same as an impedance of every other TDL.
摘要翻译： 提供了具有宽带无源幅度补偿的真实时延（“TTD”）系统。 TTD系统包括输入开关，输出开关，设置在输入开关和输出开关之间的参考延迟线，以及设置在输入开关和输出开关之间的时间延迟线。 每个延迟线（“TDL”）具有不同的线路长度，并且在两个对应的接地层之间包括中心导体。 每个中心导体具有宽度并且通过间隙空间与两个对应的接地平面分离。 对于每个TDL，中心导体的宽度被配置为使得TDL的损耗基本上与工作频率范围上每隔一个TDL的损耗相同。 对于每个TDL，间隙空间被配置为使得TDL的阻抗基本上与每个其它TDL的阻抗相同。
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公开(公告)号：US08742646B2
公开(公告)日：2014-06-03
申请号：US13433422
申请日：2012-03-29
申请人： Robert Gideon Wodnicki , Charles Edward Baumgartner , David Martin Mills , Kevin Matthew Durocher , William Hullinger Huber , George Charles Sogoian , Christopher James Kapusta
发明人： Robert Gideon Wodnicki , Charles Edward Baumgartner , David Martin Mills , Kevin Matthew Durocher , William Hullinger Huber , George Charles Sogoian , Christopher James Kapusta
CPC分类号： B06B1/0622 , H01L41/338 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/1433 , H01L2924/15321 , Y10T29/42 , H01L2924/00
摘要： An ultrasound acoustic assembly includes a number of ultrasound acoustic arrays, each array comprising an acoustic stack comprising a piezoelectric layer assembled with at least one acoustic impedance dematching layer and with a support layer. The acoustic stack defines a number of dicing kerfs and a number of acoustic elements, such that the dicing kerfs are formed between neighboring ones of the acoustic elements. The dicing kerfs extend through the piezoelectric layer and through the acoustic impedance dematching layer(s) but extend only partially through the support layer. The ultrasound acoustic assembly further includes a number of application specific integrated circuit (ASIC) die. Each ultrasound acoustic array is coupled to a respective ASIC die to form a respective acoustic-electric transducer module. Methods of manufacture are also provided.
摘要翻译： 超声波声学组件包括多个超声波阵列，每个阵列包括声叠层，声堆叠包括与至少一个声阻抗分配层和支撑层组装的压电层。 声学堆叠限定了多个切割切口和多个声学元件，使得切割切口形成在相邻的声学元件之间。 切割切口延伸穿过压电层并通过声阻抗分层，但仅部分延伸穿过支撑层。 超声波组件还包括许多专用集成电路（ASIC）芯片。 每个超声波阵列耦合到相应的ASIC管芯，以形成相应的声电传感器模块。 还提供了制造方法。
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公开(公告)号：US07427566B2
公开(公告)日：2008-09-23
申请号：US11297868
申请日：2005-12-09
IPC分类号： H01L21/302
CPC分类号： H01L23/473 , F28F3/12 , H01L2924/0002 , H05K3/108 , H01L2924/00
摘要： A method is provided. The method includes forming a conductive layer on an inner surface of a substrate and providing a sacrificial layer over the conductive layer. The method includes forming a plurality of channels in the sacrificial layer and plating the sacrificial layer to substantially fill the plurality of channels with a plating material comprising conducting material. The method also includes etching the sacrificial layer to form a conducting structure having fins where conducting material remains separated by microchannels where the sacrificial layer is etched.
摘要翻译： 提供了一种方法。 该方法包括在衬底的内表面上形成导电层并在导电层上提供牺牲层。 该方法包括在牺牲层中形成多个通道，并且使牺牲层电镀以使包含导电材料的镀覆材料基本上填充多个通道。 该方法还包括蚀刻牺牲层以形成具有翅片的导电结构，其中导电材料保持由其中蚀刻牺牲层的微通道分离。
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公开(公告)号：US06773962B2
公开(公告)日：2004-08-10
申请号：US09681304
申请日：2001-03-15
申请人： Richard Joseph Saia , Kevin Matthew Durocher , Christopher James Kapusta , Matthew Christian Nielsen
发明人： Richard Joseph Saia , Kevin Matthew Durocher , Christopher James Kapusta , Matthew Christian Nielsen
IPC分类号： H01L2144
CPC分类号： B81B7/0077 , H01L24/19 , H01L2224/04105 , H01L2224/82039 , H01L2224/92144 , H01L2924/12042 , H01L2924/14 , H01L2924/18162 , H01L2924/00
摘要： A method for packaging a microelectromechanical system (MEMS) device comprises: using a partially-cured adhesive to attach a release sheet to a MEMS package flexible layer; providing a cavity extending through the release sheet and at least partially through the MEMS package flexible layer; removing the release sheet; and attaching the MEMS device to the MEMS package flexible layer with a MEMS structure of the MEMS device being positioned within the cavity.
摘要翻译： 用于封装微机电系统（MEMS）装置的方法包括：使用部分固化的粘合剂将剥离片附接到MEMS封装柔性层; 提供延伸穿过所述隔离片并且至少部分地穿过所述MEMS封装柔性层的空腔; 去除脱模片; 以及将所述MEMS器件连接到所述MEMS封装柔性层，所述MEMS器件的MEMS结构位于所述腔内。
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