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1.
公开(公告)号:US20090304951A1
公开(公告)日:2009-12-10
申请号:US12542287
申请日:2009-08-17
申请人: Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人: Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
IPC分类号: C23C16/513 , G21G5/00
CPC分类号: H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译: 描述了形成具有受控双轴应力的超低介电常数层的方法,其包括以下步骤:通过PECVD和旋涂方法之一形成包含Si,C,O和H的层,并在含有非常低的浓度的环境中固化该膜 的氧和水各自小于10ppm。 还通过使用介电常数不超过2.8的方法描述材料。 本发明克服了低双轴应力低于46MPa的薄膜形成问题。
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公开(公告)号:US07357977B2
公开(公告)日:2008-04-15
申请号:US11034479
申请日:2005-01-13
申请人: Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人: Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
CPC分类号: H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译: 描述了形成具有受控双轴应力的超低介电常数层的方法,其包括以下步骤:通过PECVD和旋涂方法之一形成包含Si,C,O和H的层,并在含有非常低的浓度的环境中固化该膜 的氧和水各自小于10ppm。 还通过使用介电常数不大于2.8的方法描述材料。 本发明克服了低双轴应力低于46MPa的薄膜形成问题。
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公开(公告)号:US20080286494A1
公开(公告)日:2008-11-20
申请号:US12044334
申请日:2008-03-07
申请人: Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
发明人: Christos Dimitrios Dimitrakopoulos , Stephen McConnell Gates , Alfred Grill , Michael Wayne Lane , Eric Gerhard Liniger , Xiao Hu Liu , Son Van Nguyen , Deborah Ann Neumayer , Thomas McCarroll Shaw
CPC分类号: H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要: A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
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公开(公告)号:US07745863B2
公开(公告)日:2010-06-29
申请号:US12146576
申请日:2008-06-26
申请人: James W. Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
发明人: James W. Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
IPC分类号: H01L29/82
CPC分类号: H01L28/55 , H01L27/0629 , H01L27/11502 , H01L27/11507 , Y10S438/977
摘要: A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelectric delivery wafer. These separate structures are then brought into contact with each and the ferroelectric film of the delivery wafer is bonded to the upper conductive electrode layer of the CMOS structure by using a low temperature anneal step. A portion of the delivery wafer is then removed providing an integrated FE/CMOS structure wherein the ferroelectric capacitor is formed on top of the CMOS structure. The capacitor is in contact with the transistor of the CMOS structure through all the wiring levels of the CMOS structure.
摘要翻译: 提供了一种形成集成的铁电/ CMOS结构的方法,其有效地分离不兼容的高温沉积和退火工艺。 本发明的方法包括分别形成CMOS结构和铁电输送晶片。 然后使这些分离的结构与每个结构接触,并且通过使用低温退火步骤将输送晶片的铁电体膜结合到CMOS结构的上导电电极层。 然后去除输送晶片的一部分,提供集成的FE / CMOS结构,其中铁电电容器形成在CMOS结构的顶部。 电容器通过CMOS结构的所有布线级与CMOS结构的晶体管接触。
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公开(公告)号:US20080258194A1
公开(公告)日:2008-10-23
申请号:US12146576
申请日:2008-06-26
申请人: James William Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
发明人: James William Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
IPC分类号: H01L27/108
CPC分类号: H01L28/55 , H01L27/0629 , H01L27/11502 , H01L27/11507 , Y10S438/977
摘要: A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelectric delivery wafer. These separate structures are then brought into contact with each and the ferroelectric film of the delivery wafer is bonded to the upper conductive electrode layer of the CMOS structure by using a low temperature anneal step. A portion of the delivery wafer is then removed providing an integrated FE/CMOS structure wherein the ferroelectric capacitor is formed on top of the CMOS structure. The capacitor is in contact with the transistor of the CMOS structure through all the wiring levels of the CMOS structure.
摘要翻译: 提供了一种形成集成的铁电/ CMOS结构的方法,其有效地分离不兼容的高温沉积和退火工艺。 本发明的方法包括分别形成CMOS结构和铁电输送晶片。 然后使这些分离的结构与每个结构接触,并且通过使用低温退火步骤将输送晶片的铁电体膜结合到CMOS结构的上导电电极层。 然后去除输送晶片的一部分,提供集成的FE / CMOS结构,其中铁电电容器形成在CMOS结构的顶部。 电容器通过CMOS结构的所有布线级与CMOS结构的晶体管接触。
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公开(公告)号:US07402857B2
公开(公告)日:2008-07-22
申请号:US11687000
申请日:2007-03-16
申请人: James W. Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
发明人: James W. Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
IPC分类号: H01L27/108 , H01L29/94
CPC分类号: H01L28/55 , H01L27/0629 , H01L27/11502 , H01L27/11507 , Y10S438/977
摘要: A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelectric delivery wafer. These separate structures are then brought into contact with each and the ferroelectric film of the delivery wafer is bonded to the upper conductive electrode layer of the CMOS structure by using a low temperature anneal step. A portion of the delivery wafer is then removed providing an integrated FE/CMOS structure wherein the ferroelectric capacitor is formed on top of the CMOS structure. The capacitor is in contact with the transistor of the CMOS structure through all the wiring levels of the CMOS structure.
摘要翻译: 提供了一种形成集成的铁电/ CMOS结构的方法,其有效地分离不兼容的高温沉积和退火工艺。 本发明的方法包括分别形成CMOS结构和铁电输送晶片。 然后使这些分离的结构与每个结构接触,并且通过使用低温退火步骤将输送晶片的铁电体膜结合到CMOS结构的上导电电极层。 然后去除输送晶片的一部分,提供集成的FE / CMOS结构,其中铁电电容器形成在CMOS结构的顶部。 电容器通过CMOS结构的所有布线级与CMOS结构的晶体管接触。
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公开(公告)号:US07186573B2
公开(公告)日:2007-03-06
申请号:US11263024
申请日:2005-10-31
申请人: James William Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
发明人: James William Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
IPC分类号: H01L21/00
CPC分类号: H01L28/55 , H01L27/0629 , H01L27/11502 , H01L27/11507 , Y10S438/977
摘要: A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelectric delivery wafer. These separate structures are then brought into contact with each and the ferroelectric film of the delivery wafer is bonded to the upper conductive electrode layer of the CMOS structure by using a low temperature anneal step. A portion of the delivery wafer is then removed providing an integrated FE/CMOS structure wherein the ferroelectric capacitor is formed on top of the CMOS structure. The capacitor is in contact with the transistor of the CMOS structure through all the wiring levels of the CMOS structure.
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8.
公开(公告)号:US06388285B1
公开(公告)日:2002-05-14
申请号:US09325857
申请日:1999-06-04
申请人: Charles Thomas Black , Cyril Cabral, Jr. , Alfred Grill , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
发明人: Charles Thomas Black , Cyril Cabral, Jr. , Alfred Grill , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
IPC分类号: H01L29788
CPC分类号: H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75
摘要: An integrated ferroelectric/CMOS structure which comprises at least a ferroelectric material, a pair of electrodes in contact with opposite surfaces of the ferroelectric material, where the electrodes do not decompose at deposition or annealing, and an oxygen source layer in contact with at least one of said electrodes, said oxygen source layer being a metal oxide which at least partially decomposes during deposition and/or subsequent processing is provided as well as a method of fabricating the same.
摘要翻译: 一种集成铁电/ CMOS结构,其至少包括铁电材料,与所述铁电材料的相对表面接触的一对电极,其中所述电极在沉积或退火时不分解,以及氧源层与至少一个 的所述电极,所述氧源层是在沉积期间和/或后续处理中至少部分分解的金属氧化物以及其制造方法。
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公开(公告)号:US06333202B1
公开(公告)日:2001-12-25
申请号:US09383744
申请日:1999-08-26
申请人: James William Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
发明人: James William Adkisson , Charles Thomas Black , Alfred Grill , Randy William Mann , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
IPC分类号: H01L2100
CPC分类号: H01L28/55 , H01L27/0629 , H01L27/11502 , H01L27/11507 , Y10S438/977
摘要: A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelectric delivery wafer. These separate structures are then brought into contact with each and the ferroelectric film of the delivery wafer is bonded to the upper conductive electrode layer of the CMOS structure by using a low temperature anneal step. A portion of the delivery wafer is then removed providing an integrated FE/CMOS structure wherein the ferroelectric capacitor is formed on top of the CMOS structure. The capacitor is in contact with the transistor of the CMOS structure through all the wiring levels of the CMOS structure.
摘要翻译: 提供了一种形成集成的铁电/ CMOS结构的方法,其有效地分离不兼容的高温沉积和退火工艺。 本发明的方法包括分别形成CMOS结构和铁电输送晶片。 然后使这些分离的结构与每个结构接触,并且通过使用低温退火步骤将输送晶片的铁电体膜结合到CMOS结构的上导电电极层。 然后去除输送晶片的一部分,提供集成的FE / CMOS结构,其中铁电电容器形成在CMOS结构的顶部。 电容器通过CMOS结构的所有布线级与CMOS结构的晶体管接触。
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10.
公开(公告)号:US06773982B2
公开(公告)日:2004-08-10
申请号:US09927694
申请日:2001-08-10
申请人: Charles Thomas Black , Cyril Cabral, Jr. , Alfred Grill , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
发明人: Charles Thomas Black , Cyril Cabral, Jr. , Alfred Grill , Deborah Ann Neumayer , Wilbur David Pricer , Katherine Lynn Saenger , Thomas McCarroll Shaw
IPC分类号: H01L218242
CPC分类号: H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75
摘要: An integrated ferroelectric/CMOS structure which comprises at least a ferroelectric material, a pair of electrodes in contact with opposite surfaces of the ferroelectric material, where the electrodes do not decompose at deposition or annealing, and an oxygen source layer in contact with at least one of said electrodes, said oxygen source layer being a metal oxide which at least partially decomposes during deposition and/or subsequent processing is provided as well as a method of fabricating the same.
摘要翻译: 一种集成铁电/ CMOS结构,其至少包括铁电材料,与所述铁电材料的相对表面接触的一对电极,其中所述电极在沉积或退火时不分解,以及氧源层与至少一个 的所述电极,所述氧源层是在沉积期间和/或后续处理中至少部分分解的金属氧化物以及其制造方法。
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