HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR WITH STABLE THRESHOLD VOLTAGE AND RELATED MANUFACTURING METHOD
    1.
    发明申请
    HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR WITH STABLE THRESHOLD VOLTAGE AND RELATED MANUFACTURING METHOD 有权
    具有稳定阈值电压的高压金属氧化物半导体晶体管及相关制造方法

    公开(公告)号:US20120080752A1

    公开(公告)日:2012-04-05

    申请号:US12898668

    申请日:2010-10-05

    CPC classification number: H01L21/26586 H01L29/6659 H01L29/7833

    Abstract: A high voltage metal-oxide-semiconductor (HVMOS) transistor includes a gate poly, wherein a channel is formed in an area projected from the gate poly in a thickness direction when the HVMOS is activated; two carrier drain drift regions, adjacent to the area projected from the gate poly, wherein at least one of the carrier drain drift regions has a gradient doping concentration; and two carrier plus regions, respectively locate within the two carrier drain drift regions, wherein the two carrier plus regions and the two carrier drain drift regions are communicating with each other through the channel when the HVMOS is activated.

    Abstract translation: 高压金属氧化物半导体(HVMOS)晶体管包括栅极聚合物,其中当HVMOS被激活时,在厚度方向上从栅极poly突出的区域中形成沟道; 两个载波漏极漂移区,邻近从栅极poly投影的区域,其中至少一个载流子漂移区具有梯度掺杂浓度; 和两个载波加区域分别位于两个载波漏极漂移区域内,其中当HVMOS被激活时,两个载波加区域和两个载波漏极漂移区域通过信道彼此通信。

    Nasal filter
    2.
    发明授权
    Nasal filter 有权
    鼻过滤器

    公开(公告)号:US08347885B2

    公开(公告)日:2013-01-08

    申请号:US12950132

    申请日:2010-11-19

    Applicant: Chun-Yu Chou

    Inventor: Chun-Yu Chou

    CPC classification number: A61M16/105 A61M16/107 A61M2210/0618 A62B23/06

    Abstract: A nasal filter includes a main body, a cover, and a filtering medium. The main body has a hollow cylinder, a boss connected to a spherical member, a flange, and a plurality of internal guide vanes. The hollow cylinder has a front and a rear opening. A first threaded portion is formed on the outer surface at the front end portion of the hollow cylinder. A thru hole is formed on the cover and aligns correspondingly to the front opening of the hollow cylinder. A second threaded portion is formed on the inner surface of the cover for mating to the first threaded portion on the hollow cylinder. The filtering medium is held in between the cover and the hollow cylinder and covers the thru hole. A filter pad is further included to provide additional functions. Accordingly, the nasal filter offers air purification and doe not cover the mouth.

    Abstract translation: 鼻过滤器包括主体,盖和过滤介质。 主体具有中空圆柱体,连接到球形部件的凸台,凸缘和多个内部导向叶片。 中空圆筒具有前开口和后开口。 第一螺纹部分形成在中空圆筒的前端部分的外表面上。 在盖上形成通孔,并对应于中空圆筒的前开口。 第二螺纹部分形成在盖的内表面上,用于与中空圆柱体上的第一螺纹部分配合。 过滤介质保持在盖和中空圆筒之间并覆盖通孔。 还包括一个滤垫以提供附加功能。 因此,鼻过滤器提供空气净化,并且不覆盖口。

    High voltage metal-oxide-semiconductor transistor with stable threshold voltage and related manufacturing method
    3.
    发明授权
    High voltage metal-oxide-semiconductor transistor with stable threshold voltage and related manufacturing method 有权
    具有稳定阈值电压的高压金属氧化物半导体晶体管及相关制造方法

    公开(公告)号:US08278709B2

    公开(公告)日:2012-10-02

    申请号:US12898668

    申请日:2010-10-05

    CPC classification number: H01L21/26586 H01L29/6659 H01L29/7833

    Abstract: A high voltage metal-oxide-semiconductor (HVMOS) transistor includes a gate poly, wherein a channel is formed in an area projected from the gate poly in a thickness direction when the HVMOS is activated; two carrier drain drift regions, adjacent to the area projected from the gate poly, wherein at least one of the carrier drain drift regions has a gradient doping concentration; and two carrier plus regions, respectively locate within the two carrier drain drift regions, wherein the two carrier plus regions and the two carrier drain drift regions are communicating with each other through the channel when the HVMOS is activated.

    Abstract translation: 高压金属氧化物半导体(HVMOS)晶体管包括栅极聚合物,其中当HVMOS被激活时,在厚度方向上从栅极poly突出的区域中形成沟道; 两个载波漏极漂移区,邻近从栅极poly投影的区域,其中至少一个载流子漂移区具有梯度掺杂浓度; 和两个载波加区域分别位于两个载波漏极漂移区域内,其中当HVMOS被激活时,两个载波加区域和两个载波漏极漂移区域通过信道彼此通信。

    METHOD OF FABRICATING SEMICONDUCTOR DEVICE
    4.
    发明申请
    METHOD OF FABRICATING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号:US20110195553A1

    公开(公告)日:2011-08-11

    申请号:US12701623

    申请日:2010-02-08

    CPC classification number: H01L29/1083 H01L29/7833

    Abstract: A method of fabricating a semiconductor device is provided. The method comprises: forming a first layer; forming a P-well on the first layer; forming an isolation region in the P-well; performing an extra implantation on a surface between the P-well and the first layer; and forming a source/drain region. The method of the present invention can solve the punch through problem of the conventional iso-NMOS transistor without increasing cost.

    Abstract translation: 提供一种制造半导体器件的方法。 该方法包括:形成第一层; 在第一层上形成P阱; 在P阱中形成隔离区; 在P阱和第一层之间的表面上执行额外的注入; 并形成源/漏区。 本发明的方法可以解决传统的等效NMOS晶体管的冲孔问题,而不增加成本。

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