Low-latency audio output with variable group delay

    公开(公告)号:US11438697B2

    公开(公告)日:2022-09-06

    申请号:US16706287

    申请日:2019-12-06

    Abstract: A system may include a digital delta-sigma modulator configured to receive a digital audio input signal and quantize the digital audio input signal into a quantized signal, a filter configured to receive the quantized signal and perform filtering on the quantized signal to generate a filtered quantized signal, the filter having a variable group delay, and a current-mode digital-to-analog converter configured to receive the filtered quantized signal and convert the filtered quantized signal into an equivalent current-mode analog audio signal.

    CURRENT DIGITAL-TO-ANALOG CONVERTER WITH WARMING OF DIGITAL-TO-ANALOG CONVERTER ELEMENTS

    公开(公告)号:US20210175894A1

    公开(公告)日:2021-06-10

    申请号:US16942062

    申请日:2020-07-29

    Abstract: A differential output current digital-to-analog (IDAC) circuit may include a delta-sigma modulator configured to receive a digital input signal, a control circuit responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, the plurality of DAC elements configured to, in concert, generate a differential output current signal based on the digital input signal to a load coupled to a pair of output terminals of the IDAC, and a plurality of warming switches, each warming switch coupled to a respective bias transistor of a respective DAC element of the plurality of DAC elements, wherein the control circuit may further be configured to selectively control each such warming switch in order to selectively de-bias and bias a respective bias transistor of such warming switch when a respective DAC element of the respective bias transistor is output-disabled from generating the differential output current signal.

    Current digital-to-analog converter with warming of digital-to-analog converter elements

    公开(公告)号:US11043959B1

    公开(公告)日:2021-06-22

    申请号:US16942062

    申请日:2020-07-29

    Abstract: A differential output current digital-to-analog (IDAC) circuit may include a delta-sigma modulator configured to receive a digital input signal, a control circuit responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, the plurality of DAC elements configured to, in concert, generate a differential output current signal based on the digital input signal to a load coupled to a pair of output terminals of the IDAC, and a plurality of warming switches, each warming switch coupled to a respective bias transistor of a respective DAC element of the plurality of DAC elements, wherein the control circuit may further be configured to selectively control each such warming switch in order to selectively de-bias and bias a respective bias transistor of such warming switch when a respective DAC element of the respective bias transistor is output-disabled from generating the differential output current signal.

    Low-latency audio output with variable group delay

    公开(公告)号:US10701486B1

    公开(公告)日:2020-06-30

    申请号:US16522439

    申请日:2019-07-25

    Abstract: A system may include a filter configured to receive a digital audio input signal quantized at between two and 257 quantization levels and sampled at at least 500 kilohertz, the filter further configured to perform filtering on the digital audio input signal to generate a filtered digital audio input signal, the filter having a selectable variable group delay, a digital-to-analog converter configured to receive the filtered digital audio input signal and convert the filtered digital audio input signal into an equivalent analog audio input signal, and a driver configured to receive the equivalent analog audio input signal and drive an analog audio output signal to a transducer.

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