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    Memory arrays using nanotube articles with reprogrammable resistance
    5.
    发明授权
    Memory arrays using nanotube articles with reprogrammable resistance 有权
    使用具有可编程电阻的纳米管制品的存储器阵列

    公开(公告)号：US07479654B2

    公开(公告)日：2009-01-20

    申请号：US11274967

    申请日：2005-11-15

    申请人： Claude L. Bertin ,  Frank Guo ,  Thomas Rueckes ,  Steven L. Konsek ,  Mitchell Meinhold ,  Max Strasburg ,  Ramesh Sivarajan ,  X. M. Henry Huang

    发明人： Claude L. Bertin ,  Frank Guo ,  Thomas Rueckes ,  Steven L. Konsek ,  Mitchell Meinhold ,  Max Strasburg ,  Ramesh Sivarajan ,  X. M. Henry Huang

    IPC分类号： H01L29/08 ,  H01L35/24

    CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C13/0002 ,  G11C2213/16 ,  G11C2213/19 ,  G11C2213/35 ,  G11C2213/79

    摘要： A memory array includes a plurality of memory cells, each of which receives a bit line, a first word line, and a second word line. Each memory cell includes a cell selection circuit, which allows the memory cell to be selected. Each memory cell also includes a two-terminal switching device, which includes first and second conductive terminals in electrical communication with a nanotube article. The memory array also includes a memory operation circuit, which is operably coupled to the bit line, the first word line, and the second word line of each cell. The circuit can select the cell by activating an appropriate line, and can apply appropriate electrical stimuli to an appropriate line to reprogrammably change the relative resistance of the nanotube article between the first and second terminals. The relative resistance corresponds to an informational state of the memory cell.

    摘要翻译： 存储器阵列包括多个存储器单元，每个存储单元接收位线，第一字线和第二字线。 每个存储单元包括单元选择电路，其允许选择存储单元。 每个存储单元还包括两端开关器件，其包括与纳米管制品电连通的第一和第二导电端子。 存储器阵列还包括可操作地耦合到每个单元的位线，第一字线和第二字线的存储器操作电路。 电路可以通过激活适当的线路来选择细胞，并且可以将适当的电刺激施加到适当的线以可重新编程地改变纳米管制品在第一和第二端子之间的相对电阻。 相对电阻对应于存储单元的信息状态。

    Nonvolatile resistive memories having scalable two-terminal nanotube switches
    8.
    发明授权
    Nonvolatile resistive memories having scalable two-terminal nanotube switches 有权
    具有可扩展的两端纳米管开关的非易失性电阻存储器

    公开(公告)号：US08102018B2

    公开(公告)日：2012-01-24

    申请号：US11835612

    申请日：2007-08-08

    申请人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    IPC分类号： G11C11/56 ,  G11C5/00 ,  H01L29/00

    CPC分类号： B82Y10/00 ,  G11C11/56 ,  G11C13/003 ,  G11C13/025 ,  G11C19/00 ,  G11C29/86 ,  G11C2213/19 ,  G11C2213/75 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/1052 ,  H01L27/112 ,  H01L27/11206

    摘要： A non-volatile resistive memory is provided. The memory includes at least one non-volatile memory cell and selection circuitry. Each memory cell has a two-terminal nanotube switching device having and a nanotube fabric article disposed between and in electrical communication with two conductive terminals. Selection circuitry is operable to select the two-terminal nanotube switching device for read and write operations. Write control circuitry, responsive to a control signal, supplies write signals to a selected memory cell to induce a change in the resistance of the nanotube fabric article, the resistance corresponding to an informational state of the memory cell. Resistance sensing circuitry in communication with a selected nonvolatile memory cell, senses the resistance of the nanotube fabric article and provides the control signal to the write control circuitry. Read circuitry reads the corresponding informational state of the memory cell.

    摘要翻译： 提供了非易失性电阻性存储器。 存储器包括至少一个非易失性存储单元和选择电路。 每个存储单元具有两端纳米管切换装置，其具有设置在两个导电端子之间并与两个导电端子电连通的纳米管织物制品。 选择电路可操作以选择用于读和写操作的两端纳米管切换装置。 响应于控制信号的写控制电路向所选存储单元提供写入信号，以引起纳米管织物物品的电阻变化，该电阻对应于存储单元的信息状态。 与所选择的非易失性存储器单元通信的电阻感测电路感测纳米管织物制品的电阻并将控制信号提供给写入控制电路。 读取电路读取存储单元的相应信息状态。

    Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements
    9.
    发明授权
    Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements 有权
    锁存电路和操作电路具有可扩展的非易失性纳米管开关作为电子保险丝更换元件

    公开(公告)号：US08008745B2

    公开(公告)日：2011-08-30

    申请号：US11835583

    申请日：2007-08-08

    申请人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  Jonathan W. Ward ,  Frank Guo ,  Steven L. Konsek ,  Mitchell Meinhold

    IPC分类号： H01L23/52

    CPC分类号： B82Y10/00 ,  G11C13/025 ,  G11C17/14 ,  G11C17/143 ,  G11C17/16 ,  G11C17/165 ,  G11C17/18 ,  G11C2213/19 ,  H01L23/5256 ,  H01L27/101 ,  H01L27/1052 ,  H01L27/112 ,  H01L27/11206 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/3011 ,  Y10S977/943 ,  H01L2924/00

    摘要： A non-volatile latch circuit is provided. The non-volatile latch circuit includes a nanotube switching element capable of switching between resistance states and non-volatilely retaining the resistance state. The non-volatile latch circuit includes a volatile latch circuit is capable of receiving and volatilely storing a logic state. When the nanotube switching element is a resistance state, the volatile latch circuit retains a corresponding logic state and outputs that corresponding logic state at an output terminal. A non-volatile register file configuration circuit for use with a plurality of non-volatile register files is also provided. The non-volatile register file configuration circuit includes a selection circuitry and a plurality of nanotube fuse elements, each in electrical communication with one of a plurality of non-volatile register files. The selection circuitry is capable of applying electrical stimulus to each of the selected nanotube fuse elements to selectively bypass the corresponding register file.

    摘要翻译： 提供非易失性锁存电路。 非易失性锁存电路包括能够在电阻状态之间切换并且非易失性地保持电阻状态的纳米管开关元件。 非易失性锁存电路包括易失性锁存电路，其能够接收和不稳定地存储逻辑状态。 当纳米管开关元件为电阻状态时，易失性锁存电路保持相应的逻辑状态，并在输出端输出相应的逻辑状态。 还提供了与多个非易失性寄存器文件一起使用的非易失性寄存器文件配置电路。 非易失性寄存器文件配置电路包括选择电路和多个纳米管熔丝元件，每个纳米管熔丝元件与多个非易失性寄存器文件中的一个电气通信。 选择电路能够对每个选定的纳米管熔丝元件施加电刺激以选择性地绕过相应的寄存器文件。