MODULAR LOW STRESS PACKAGE TECHNOLOGY
    1.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 有权
    模块式低应力包技术

    公开(公告)号:US20110087356A1

    公开(公告)日:2011-04-14

    申请号:US12903779

    申请日:2010-10-13

    Abstract: A method of designing a desired modular package assembly: determining the configuration and dimensions of the assembly from received user input design data, the assembly having a protective modular package cover with first and second fastening sections, subassembly receiving sections disposed between the fastening sections and having a cross member formed along the underside of the protective modular package cover and configured to receive a subassembly, and one or more subassemblies to be received by the subassembly receiving sections; determining an adhesive deposition strategy for deposition of an adhesive layer to the cross members of the subassembly receiving sections sufficient to affix the top side of the subassemblies to the cross members on the underside of the subassembly receiving sections; and incorporating the configuration and dimensions of the modular package assembly and the adhesive deposition strategy into a manufacturing assembly process configured to manufacture the modular package assembly.

    Abstract translation: 一种设计所需模块化封装组件的方法:从接收的用户输入设计数据确定组件的构造和尺寸,该组件具有带有第一和第二紧固部分的保护性模块化封装盖,设置在紧固部分之间的子组件接收部分, 沿着保护性模块化封装盖的下侧形成并构造成接收子组件的横向构件以及将被子组件接收部分接收的一个或多个子组件; 确定用于将粘合剂层沉积到子组件接收部分的横向构件的粘合剂沉积策略,足以将子组件的顶侧固定到子组件接收部分的下侧上的横向构件; 以及将模块化封装组件和粘合剂沉积策略的构造和尺寸结合到被配置为制造模块化封装组件的制造组装过程中。

    Modular low stress package technology
    2.
    发明授权
    Modular low stress package technology 有权
    模块化低应力包技术

    公开(公告)号:US08759965B2

    公开(公告)日:2014-06-24

    申请号:US12903752

    申请日:2010-10-13

    Abstract: A protective modular package assembly with one or more subassemblies, each having a base element, a sidewall element coupled to the base element, and a semiconductor device disposed within and coupled to the sidewall element and the base element; a protective modular package cover having fastening sections located at opposing ends of the cover, torque elements disposed on the opposing ends and configured to fasten the cover to a core, and subassembly receiving sections disposed between the fastening sections with each subassembly receiving section operable to receive a subassembly and having a cross member along the underside of the cover; and an adhesive layer configured to affix subassemblies to respective subassembly receiving sections. The torque elements are configured to transfer a downward clamping force generated at the fastening elements to a top surface of the subassemblies via the cross member of each of the one or more subassembly receiving sections.

    Abstract translation: 一种具有一个或多个子组件的保护性模块化封装组件,每个子组件具有基座元件,耦合到所述基座元件的侧壁元件以及设置在所述侧壁元件和所述基座元件内并联接到所述侧壁元件和所述基座元件的半导体器件; 保护性模块化封装盖,其具有位于盖的相对端处的紧固部分,设置在相对端部上的扭矩元件,其构造成将盖子紧固到芯部;以及子组件接收部分,其设置在紧固部分之间,每个子组件接收部分可操作以接收 子组件,并且沿着盖的下侧具有横向构件; 以及被配置为将子组件固定到相应的子组件接收部分的粘合剂层。 扭矩元件构造成经由一个或多个子组件接收部分中的每一个的横向构件将在紧固元件处产生的向下夹持力传递到子组件的顶表面。

    Method for pre-migration of metal ions in a semiconductor package
    3.
    发明授权
    Method for pre-migration of metal ions in a semiconductor package 有权
    半导体封装中金属离子预迁移的方法

    公开(公告)号:US08557703B2

    公开(公告)日:2013-10-15

    申请号:US12806428

    申请日:2010-08-12

    Abstract: According to an embodiment of the present disclosure, a method of pre-migrating metal ions is disclosed. A metal in a semiconductor configuration is exposed to water and oxygen to yield metal ions. The metal couples a conductor to another material. The metal and the conductor are exposed to an electrical field in such a manner that one or both of the metal and the conductor becomes an anode to a corresponding cathode. The metal ions are then allowed to migrate from the anode to the cathode to form a migrated metal. Finally, a migration inhibitor is applied on top of the migrated metal to prevent further migration.

    Abstract translation: 根据本公开的实施例,公开了迁移前金属离子的方法。 将半导体结构中的金属暴露于水和氧气中以产生金属离子。 金属将导体耦合到另一种材料。 金属和导体以使得金属和导体中的一个或两个成为相应阴极的阳极的方式暴露于电场。 然后允许金属离子从阳极迁移到阴极以形成迁移的金属。 最后,将迁移抑制剂施加在迁移的金属的顶部以防止进一步迁移。

    MODULAR LOW STRESS PACKAGE TECHNOLOGY
    4.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 有权
    模块式低应力包技术

    公开(公告)号:US20110087353A1

    公开(公告)日:2011-04-14

    申请号:US12903772

    申请日:2010-10-13

    Abstract: A method of designing a modular package: determining a package outline of a modular package assembly from package outline design data; determining seating plane and overall package length characteristics of the assembly from seating plane and package length design data; the design tool calculating minimum package height of the modular package assembly from the seating plane and package length design data; designing the dimensions and configuration of one or more subassemblies from subassembly design data; defining dimensions and configuration of a plurality of mechanical layers of a protective modular package cover given the defined package outline, the seating plane, overall package length, the minimum package height, and the subassemblies; defining an adhesive deposition strategy to join mechanical layers of the cover; designing the cover in accordance with the dimensions and configuration of the mechanical layers; and incorporating the assembly and the adhesive deposition strategy into a manufacturing assembly process.

    Abstract translation: 一种设计模块化封装的方法:从封装外形设计数据确定模块封装组件的封装外形; 从座面和包装长度设计数据确定组件的座面和整体包装长度特性; 设计工具从座面和封装长度设计数据计算模块化封装组件的最小封装高度; 从子组件设计数据设计一个或多个子组件的尺寸和配置; 给定了限定的包装轮廓,座面,总包装长度,最小包装高度和子组件,限定保护性模块化包装盖的多个机械层的尺寸和构造; 限定粘合剂沉积策略以连接盖的机械层; 根据机械层的尺寸和结构设计盖子; 并将组装和粘合剂沉积策略结合到制造组装过程中。

    MODULAR LOW STRESS PACKAGE TECHNOLOGY
    5.
    发明申请
    MODULAR LOW STRESS PACKAGE TECHNOLOGY 有权
    模块式低应力包技术

    公开(公告)号:US20120153391A1

    公开(公告)日:2012-06-21

    申请号:US13406681

    申请日:2012-02-28

    Applicant: Craig J. Rotay

    Inventor: Craig J. Rotay

    Abstract: A semiconductor subassembly, a modular sidewall element having modular dimensions that accommodates placement of the semiconductor subassembly in a modular layout and a semiconductor substrate base element coupled to the modular sidewall element. The semiconductor substrate base element has at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element and the semiconductor substrate base element configured to form a base of the semiconductor subassembly.

    Abstract translation: 半导体子组件,具有模块化尺寸的模块化侧壁元件,其适应半导体子组件在模块化布局中的放置以及耦合到模块化侧壁元件的半导体衬底基座元件。 半导体衬底基底元件具有至少一个半导体元件,其尺寸被设计成由模块化侧壁元件和半导体衬底基底元件的模块化尺寸来容纳,该半导体元件配置成形成半导体子组件的基座。

    Method and structure for improving RF amplifier gain, linearity, and
switching speed utilizing Schottky diode technology
    6.
    发明授权
    Method and structure for improving RF amplifier gain, linearity, and switching speed utilizing Schottky diode technology 失效
    使用肖特基二极管技术改善RF放大器增益,线性度和开关速度的方法和结构

    公开(公告)号:US5532639A

    公开(公告)日:1996-07-02

    申请号:US221089

    申请日:1994-03-31

    CPC classification number: H03F3/191

    Abstract: According to the present invention, schottky diode technology is used to limit the amount of stored charge which must be overcome by an RF transistor during the portion of an RF cycle when the RF transistor attempts to turn on. Limiting the amount of stored charge stabilizes the bias point of the RF transistor on its load line so that the mode of operation of the RF transistor may be maintained. Thus, a schottky diode is placed in a RF transistor circuit and acts as a current sink to bleed stored charge to ground. Placement of the schottky diode close to the RF transistor provides a number of benefits, including introduction of the schottky diode at a low impedance point of the RF transistor circuit, minimization of lead/lag phase angles introduced by intervening matching elements, and minimization of resonance effects. The maximum benefit may be realized by placing the schottky diode as close to the RF transistor as possible, with especially good results possible by placing the schottky diode inside the RF transistor package, such as on a MOSCAP or on the RF transistor die itself. Furthermore, placement of the schottky diode within the matching network of the RF transistor limits the maximum negative deviation of the input signal to -0.2 to -0.3 volts. Placement of the schottky diode within the RF transistor package causes the schottky diode to be forward biased during the negative half of the RF input cycle, thereby not allowing the RF transistor's base-emitter junction to be sufficiently reverse biased to store charge.

    Abstract translation: 根据本发明,当RF晶体管试图导通时,肖特基二极管技术用于限制在RF周期的部分期间RF晶体管必须克服的存储电荷的量。 限制存储电荷的数量使RF晶体管在其负载线上的偏置点稳定,从而可以保持RF晶体管的工作模式。 因此,肖特基二极管被放置在RF晶体管电路中,并且用作电流阱以将存储的电荷放到地。 靠近RF晶体管的肖特基二极管的放置提供了许多好处,包括在RF晶体管电路的低阻抗点引入肖特基二极管,通过中间匹配元件引入的引线/滞后相位角的最小化以及谐振的最小化 效果。 最大的好处可以通过将肖特基二极管尽可能靠近RF晶体管来实现,通过将肖特基二极管放置在RF晶体管封装内,例如在MOSCAP或RF晶体管管芯本身上,可以实现特别好的结果。 此外,在RF晶体管的匹配网络内放置肖特基二极管将输入信号的最大负偏差限制在-0.2至-0.3伏特之间。 射频晶体管封装中的肖特基二极管的放置使得肖特基二极管在RF输入周期的负半周期期间被正向偏置,从而不允许RF晶体管的基极 - 发射极结被充分反向偏置以存储电荷。

    Modular low stress package technology
    7.
    发明授权
    Modular low stress package technology 有权
    模块化低应力包技术

    公开(公告)号:US08597984B2

    公开(公告)日:2013-12-03

    申请号:US13406697

    申请日:2012-02-28

    Applicant: Craig J. Rotay

    Inventor: Craig J. Rotay

    Abstract: A method of manufacturing a modular semiconductor subassembly: providing at least one semiconductor subassembly having a modular sidewall element of modular dimensions and a semiconductor substrate base element coupled to the modular sidewall element that has at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element. If a modular package protective cover is to be used: providing the modular package protective cover configured to accommodate the semiconductor subassembly in accordance with a modular design; securing the semiconductor subassembly in the modular package protective cover to create a modular package assembly; and mounting the modular package assembly to a core, with a base side of the semiconductor substrate base element in contact with the core; otherwise: mounting the at semiconductor subassembly to the core, with the base side of the semiconductor substrate base element in contact with the core.

    Abstract translation: 一种制造模块化半导体子组件的方法:提供具有模块化尺寸的模块化侧壁元件的至少一个半导体子组件和耦合到所述模块化侧壁元件的半导体衬底基座元件,所述半导体衬底基座元件具有至少一个半导体元件,所述半导体元件的尺寸设计成由 模块化侧壁元件的模块化尺寸。 如果要使用模块化封装保护盖:提供模块化封装保护盖,其配置为根据模块化设计容纳半导体子组件; 将半导体子组件固定在模块化封装保护盖中以产生模块化封装组件; 以及将所述模块化封装组件安装到芯部,所述半导体衬底基底元件的基极侧与所述芯体接触; 否则:将半导体子组件安装到芯部,半导体衬底基底元件的基极侧与芯体接触。

    Modular low stress package technology
    8.
    发明授权
    Modular low stress package technology 有权
    模块化低应力包技术

    公开(公告)号:US08560104B2

    公开(公告)日:2013-10-15

    申请号:US12903772

    申请日:2010-10-13

    Abstract: A method of designing a modular package: determining a package outline of a modular package assembly from package outline design data; determining seating plane and overall package length characteristics of the assembly from seating plane and package length design data; the design tool calculating minimum package height of the modular package assembly from the seating plane and package length design data; designing the dimensions and configuration of one or more subassemblies from subassembly design data; defining dimensions and configuration of a plurality of mechanical layers of a protective modular package cover given the defined package outline, the seating plane, overall package length, the minimum package height, and the subassemblies; defining an adhesive deposition strategy to join mechanical layers of the cover; designing the cover in accordance with the dimensions and configuration of the mechanical layers; and incorporating the assembly and the adhesive deposition strategy into a manufacturing assembly process.

    Abstract translation: 一种设计模块化封装的方法:从封装外形设计数据确定模块封装组件的封装外形; 从座面和包装长度设计数据确定组件的座面和整体包装长度特性; 设计工具从座面和封装长度设计数据计算模块化封装组件的最小封装高度; 从子组件设计数据设计一个或多个子组件的尺寸和配置; 给定了限定的包装轮廓,座面,总包装长度,最小包装高度和子组件,限定保护性模块化包装盖的多个机械层的尺寸和构造; 限定粘合剂沉积策略以连接盖的机械层; 根据机械层的尺寸和结构设计盖子; 并将组装和粘合剂沉积策略结合到制造组装过程中。

    Modular low stress package technology
    9.
    发明授权
    Modular low stress package technology 有权
    模块化低应力包技术

    公开(公告)号:US08153474B2

    公开(公告)日:2012-04-10

    申请号:US12903761

    申请日:2010-10-13

    Abstract: A method of manufacturing a protected package assembly: providing a protective modular package cover in accordance with a modular design; selectively applying an adhesive to the cross member of each subassembly receiving section of the protective modular package cover that will receive a subassembly to form an adhesive layer of the protective modular package cover; encapsulating the one or more subassemblies in the subassembly receiving sections on the selectively applied adhesive layer to generate a protected package assembly; and controlling application of a distributed downward clamping force applied to the top surfaces of the subassemblies received by the protective modular package cover and useful for mounting the protected package assembly to a core through activation of fastener elements and cross members of the subassembly receiving sections.

    Abstract translation: 一种制造受保护的封装组件的方法:根据模块化设计提供保护性模块化封装盖; 选择性地将粘合剂施加到保护性模块化封装盖的每个子组件接收部分的横向构件上,所述组件接收部分将接纳子组件以形成保护性模块化封装盖的粘合剂层; 将所述一个或多个子组件封装在所述选择性施加的粘合剂层上的子组件接收部分中,以产生受保护的封装组件; 以及控制施加到由所述保护性模块化封装盖接收的所述子组件的顶表面上的分布式向下夹持力的应用,并且用于通过激活所述子组件接收部分的紧固件元件和横向构件将所述受保护的封装组件安装到芯体。

    Method and system for pre-migration of metal ions in a semiconductor package
    10.
    发明申请
    Method and system for pre-migration of metal ions in a semiconductor package 有权
    半导体封装中金属离子预迁移的方法和系统

    公开(公告)号:US20120037990A1

    公开(公告)日:2012-02-16

    申请号:US12806428

    申请日:2010-08-12

    Abstract: According to an embodiment of the present disclosure, a method of pre-migrating metal ions is disclosed. A metal in a semiconductor configuration is exposed to water and oxygen to yield metal ions. The metal couples a conductor to another material. The metal and the conductor are exposed to an electrical field in such a manner that one or both of the metal and the conductor becomes an anode to a corresponding cathode. The metal ions are then allowed to migrate from the anode to the cathode to form a migrated metal. Finally, a migration inhibitor is applied on top of the migrated metal to prevent further migration.

    Abstract translation: 根据本公开的实施例,公开了迁移前金属离子的方法。 将半导体结构中的金属暴露于水和氧气中以产生金属离子。 金属将导体耦合到另一种材料。 金属和导体以使得金属和导体中的一个或两个成为相应阴极的阳极的方式暴露于电场。 然后允许金属离子从阳极迁移到阴极以形成迁移的金属。 最后,将迁移抑制剂施加在迁移的金属的顶部以防止进一步迁移。

Patent Agency Ranking