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公开(公告)号：US20210375798A1
公开(公告)日：2021-12-02
申请号：US17194390
申请日：2021-03-08
Applicant: Credo Technology Group Limited
Inventor： Mengying MA , Xike LIU , Xiangxiang YE , Xin WANG
IPC: H01L23/66 , H03H11/28 , H03M9/00 , H01L23/00 , H01L23/498
Abstract: An illustrative embodiment of a packaged integrated circuit includes: an integrated circuit chip having a SerDes signal pad; and a package substrate having a core via and an arrangement of micro-vias connecting the SerDes signal pad to an external contact for solder ball connection to a PCB trace. The core via has a first parasitic capacitance, the solder ball connection is associated with a second parasitic capacitance, and the arrangement of micro-vias provides a pi-network inductance that improves connection impedance matching. An illustrative method embodiment includes: obtaining an expected impedance of the PCB trace; determining parasitic capacitances of a core via and a solder ball connection to the PCB trace; minimizing the core via capacitance; calculating a pi-network inductance that improves impedance matching with the PCB trace; and adjusting a micro-via arrangement between the core via and the solder ball connection to provide the pi-network inductance.
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公开(公告)号：US20200020673A1
公开(公告)日：2020-01-16
申请号：US16453128
申请日：2019-06-26
Applicant: CREDO TECHNOLOGY GROUP LIMITED
Inventor： Xike LIU , Mengying MA
Abstract: A package trace design technique provides at least partial cancelation of reflections. In one illustrative method of providing a high-bandwidth chip-to-chip link with a first die coupled to a second die via a first substrate trace, an intermediate trace, and a second substrate trace, the method includes: (a) determining a first propagation delay for an electrical signal to traverse the first substrate trace, the electrical signal having a predetermined symbol interval; (b) determining a second propagation delay for the electrical signal to traverse the second substrate trace; and (c) setting a length for at least one of the first and second substrate traces, the length yielding a difference between the first and second propagation delays, the difference having a magnitude equal to half the predetermined symbol interval.
