公开(公告)号：US20140152477A1

公开(公告)日：2014-06-05

申请号：US13706035

申请日：2012-12-05

申请人： CREST SEMICONDUCTORS, INC.

发明人： Donald E. Lewis ,  Ryan James Kier ,  Rex K. Hales ,  Yusuf Haque

IPC分类号： H03M1/50 ,  H03M1/12

CPC分类号： H03M1/1061 ,  H03M1/1245 ,  H03M1/164

摘要： A time interleaving Analog-to-Digital Converter (ADC) comprises a plurality of ADCs; a timing generator that generates a clock signal for each of the ADCs such that edges of said clock signals trigger sampling of an input signal by the ADCs; and a timing adjustment circuit to receive and adjust the clock signals before the clock signals are received by the ADCs such that samplings of said input signal are spaced in time and occur at a rate of 1/N times a desired sampling rate; and circuit for adjusting the bandwidth of the plurality of ADCs.

摘要翻译： 时间交织模数转换器（ADC）包括多个ADC; 定时发生器，用于为每个ADC产生时钟信号，使得所述时钟信号的边沿触发ADC的输入信号的采样; 以及定时调整电路，用于在由ADC接收时钟信号之前接收和调整时钟信号，使得所述输入信号的采样在时间上间隔并以所需采样速率的1 / N倍的速率发生; 以及用于调整多个ADC的带宽的电路。

公开(公告)号：US09071270B2

公开(公告)日：2015-06-30

申请号：US13906590

申请日：2013-05-31

申请人： Crest Semiconductors, Inc

发明人： Tracy Johancsik ,  Ryan James Kier ,  Yusuf Haque

IPC分类号： H03M1/00 ,  H03M1/54 ,  H03M1/10 ,  H03M1/12

CPC分类号： H03M1/54 ,  H03M1/1061 ,  H03M1/1215 ,  H03M1/1245

摘要： A time-interleaved Analog-to-Digital Converter (ADC) includes a set of time multiplexed sub-ADC circuits, each sub-ADC circuit comprising a sample-and-hold circuit. Each sample-and-hold circuit includes a bootstrap circuit for maintaining a constant voltage level between an input terminal of a switch and a gate terminal of the switch, the switch for switching between a track mode and a hold mode, and a capacitor bank associated with the bootstrap circuit such that a setting of the capacitor bank affects the voltage level.

摘要翻译： 时间交织的模数转换器（ADC）包括一组时间多路复用子ADC电路，每个子ADC电路包括采样和保持电路。 每个采样和保持电路包括一个自举电路，用于在开关的输入端和开关的栅极端之间保持恒定的电压电平，用于在轨道模式和保持模式之间切换的开关以及电容器组相关联 其中自举电路使得电容器组的设置影响电压电平。

公开(公告)号：US20130265182A1

公开(公告)日：2013-10-10

申请号：US13906590

申请日：2013-05-31

申请人： Crest Semiconductors, Inc.

发明人： Tracy Johancsik ,  Ryan James Kier ,  Yusuf Haque

IPC分类号： H03M1/54

CPC分类号： H03M1/54 ,  H03M1/1061 ,  H03M1/1215 ,  H03M1/1245

摘要： A time-interleaved Analog-to-Digital Converter (ADC) includes a set of time multiplexed sub-ADC circuits, each sub-ADC circuit comprising a sample-and-hold circuit. Each sample-and-hold circuit includes a bootstrap circuit for maintaining a constant voltage level between an input terminal of a switch and a gate terminal of the switch, the switch for switching between a track mode and a hold mode, and a capacitor bank associated with the bootstrap circuit such that a setting of the capacitor bank affects the voltage level.

摘要翻译： 时间交织的模数转换器（ADC）包括一组时间多路复用子ADC电路，每个子ADC电路包括采样和保持电路。 每个采样和保持电路包括一个自举电路，用于在开关的输入端和开关的栅极端之间保持恒定的电压电平，用于在轨道模式和保持模式之间切换的开关以及电容器组相关联 其中自举电路使得电容器组的设置影响电压电平。

公开(公告)号：US08890739B2

公开(公告)日：2014-11-18

申请号：US13706035

申请日：2012-12-05

申请人： Crest Semiconductors, Inc.

发明人： Donald E. Lewis ,  Ryan James Kier ,  Rex K. Hales ,  Yusuf Haque

IPC分类号： H03M1/36 ,  H03M1/50 ,  H03M1/12

CPC分类号： H03M1/1061 ,  H03M1/1245 ,  H03M1/164

摘要： A time interleaving Analog-to-Digital Converter (ADC) comprises a plurality of ADCs; a timing generator that generates a clock signal for each of the ADCs such that edges of said clock signals trigger sampling of an input signal by the ADCs; and a timing adjustment circuit to receive and adjust the clock signals before the clock signals are received by the ADCs such that samplings of said input signal are spaced in time and occur at a rate of 1/N times a desired sampling rate; and circuit for adjusting the bandwidth of the plurality of ADCs.

摘要翻译： 时间交织模数转换器（ADC）包括多个ADC; 定时发生器，用于为每个ADC产生时钟信号，使得所述时钟信号的边沿触发ADC的输入信号的采样; 以及定时调整电路，用于在由ADC接收时钟信号之前接收和调整时钟信号，使得所述输入信号的采样在时间上间隔并以所需采样速率的1 / N倍的速率发生; 以及用于调整多个ADC的带宽的电路。