Serial magnetic logic unit architecture

    公开(公告)号:US09728233B2

    公开(公告)日:2017-08-08

    申请号:US14732561

    申请日:2015-06-05

    CPC classification number: G11C7/00 G06F3/061 G06F3/0659 G06F3/0673 G06F13/38

    Abstract: An apparatus has magnetic logic units a logic circuit configured to receive a serial input bit stream at an input node. Individual bits of data from the serial input bit stream are serially written into individual magnetic logic units without buffering the serial input bit stream between the input node and the individual magnetic logic units. Individual bits of data from individual magnetic logic units are serially read to produce a serial output bit stream on an output node without buffering the serial output bit stream between the individual magnetic logic units and the output node.

    Strap Configuration to Reduce Mechanical Stress Applied to Stress Sensitive Devices
    2.
    发明申请
    Strap Configuration to Reduce Mechanical Stress Applied to Stress Sensitive Devices 审中-公开
    肩带配置以减少应力敏感设备的机械应力

    公开(公告)号:US20150372223A1

    公开(公告)日:2015-12-24

    申请号:US14734960

    申请日:2015-06-09

    CPC classification number: G01L1/125 G11C11/161

    Abstract: An apparatus includes an elongated strap with a first platform and a second platform linked by a connector that is substantially narrower than the first platform and the second platform, where the first platform and the second platform are each configured to receive a stress sensitive device.

    Abstract translation: 一种装置包括具有第一平台的细长带和通过基本上比第一平台和第二平台窄的连接器连接的第二平台,其中第一平台和第二平台各自构造成接收应力敏感装置。

    Serial Magnetic Logic Unit Architecture
    3.
    发明申请
    Serial Magnetic Logic Unit Architecture 有权
    串行逻辑单元架构

    公开(公告)号:US20150357006A1

    公开(公告)日:2015-12-10

    申请号:US14732561

    申请日:2015-06-05

    CPC classification number: G11C7/00 G06F3/061 G06F3/0659 G06F3/0673 G06F13/38

    Abstract: An apparatus has magnetic logic units a logic circuit configured to receive a serial input bit stream at an input node. Individual bits of data from the serial input bit stream are serially written into individual magnetic logic units without buffering the serial input bit stream between the input node and the individual magnetic logic units. Individual bits of data from individual magnetic logic units are serially read to produce a serial output bit stream on an output node without buffering the serial output bit stream between the individual magnetic logic units and the output node.

    Abstract translation: 一种装置具有磁逻辑单元,逻辑电路被配置为在输入节点处接收串行输入位流。 来自串行输入比特流的单独的数据位被串行地写入单个磁逻辑单元,而不在输入节点和各个逻辑单元之间缓冲串行输入比特流。 串行读取来自各个逻辑单元的单独的数据位以在输出节点上产生串行输出比特流,而不会缓冲各个逻辑单元与输出节点之间的串行输出比特流。

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