Implantless Dopant Segregation for Silicide Contacts
    1.
    发明申请
    Implantless Dopant Segregation for Silicide Contacts 有权
    用于硅胶接触的无植入物掺杂剂分离

    公开(公告)号:US20120009771A1

    公开(公告)日:2012-01-12

    申请号:US12833272

    申请日:2010-07-09

    IPC分类号: H01L21/3205

    摘要: A method for formation of a segregated interfacial dopant layer at a junction between a semiconductor material and a silicide layer includes depositing a doped metal layer over the semiconductor material; annealing the doped metal layer and the semiconductor material, wherein the anneal causes a portion of the doped metal layer and a portion of the semiconductor material to react to form the silicide layer on the semiconductor material, and wherein the anneal further causes the segregated interfacial dopant layer to form between the semiconductor material and the silicide layer, the segregated interfacial dopant layer comprising dopants from the doped metal layer; and removing an unreacted portion of the doped metal layer from the silicide layer.

    摘要翻译: 在半导体材料和硅化物层之间的结处形成分离的界面掺杂剂层的方法包括在半导体材料上沉积掺杂的金属层; 退火所述掺杂金属层和所述半导体材料,其中所述退火使所述掺杂金属层的一部分和所述半导体材料的一部分反应以在所述半导体材料上形成所述硅化物层,并且其中所述退火还导致所述分离的界面掺杂剂 层,以形成在半导体材料和硅化物层之间,分离的界面掺杂剂层包含来自掺杂金属层的掺杂剂; 以及从所述硅化物层去除所述掺杂金属层的未反应部分。

    Implantless dopant segregation for silicide contacts
    2.
    发明授权
    Implantless dopant segregation for silicide contacts 有权
    用于硅化物接触的无植入物掺杂剂分离

    公开(公告)号:US08889537B2

    公开(公告)日:2014-11-18

    申请号:US12833272

    申请日:2010-07-09

    摘要: A method for formation of a segregated interfacial dopant layer at a junction between a semiconductor material and a silicide layer includes depositing a doped metal layer over the semiconductor material; annealing the doped metal layer and the semiconductor material, wherein the anneal causes a portion of the doped metal layer and a portion of the semiconductor material to react to form the silicide layer on the semiconductor material, and wherein the anneal further causes the segregated interfacial dopant layer to form between the semiconductor material and the silicide layer, the segregated interfacial dopant layer comprising dopants from the doped metal layer; and removing an unreacted portion of the doped metal layer from the silicide layer.

    摘要翻译: 在半导体材料和硅化物层之间的结处形成分离的界面掺杂剂层的方法包括在半导体材料上沉积掺杂的金属层; 退火所述掺杂金属层和所述半导体材料,其中所述退火使所述掺杂金属层的一部分和所述半导体材料的一部分反应以在所述半导体材料上形成所述硅化物层,并且其中所述退火还导致所述分离的界面掺杂剂 层,以形成在半导体材料和硅化物层之间,分离的界面掺杂剂层包含来自掺杂金属层的掺杂剂; 以及从所述硅化物层去除所述掺杂金属层的未反应部分。

    METHOD TO EVALUATE EFFECTIVENESS OF SUBSTRATE CLEANNESS AND QUANTITY OF PIN HOLES IN AN ANTIREFLECTIVE COATING OF A SOLAR CELL
    8.
    发明申请
    METHOD TO EVALUATE EFFECTIVENESS OF SUBSTRATE CLEANNESS AND QUANTITY OF PIN HOLES IN AN ANTIREFLECTIVE COATING OF A SOLAR CELL 有权
    用于评估太阳能电池的抗反射涂层中底物清洁度和针孔数量的有效性的方法

    公开(公告)号:US20120325316A1

    公开(公告)日:2012-12-27

    申请号:US13604230

    申请日:2012-09-05

    IPC分类号: H01L31/0232

    摘要: A method to determine the cleanness of a semiconductor substrate and the quantity/density of pin holes that may exist within a patterned antireflective coating (ARC) is provided. Electroplating is employed to monitor the changes in the porosity of the ARC caused by the pin holes during solar cell manufacturing. In particular, electroplating a metal or metal alloy to form a metallic grid on an exposed front side surface of a substrate also fills the pin holes. The quantity/density of metallic filled pin holes (and hence the number of pin holes) in the patterned ARC can then be determined.

    摘要翻译: 提供了确定半导体衬底的清洁度的方法以及可能存在于图案化抗反射涂层(ARC)内的针孔的数量/密度。 使用电镀来监测由太阳能电池制造过程中的针孔引起的ARC孔隙度的变化。 特别地,在基板的暴露的前侧表面上电镀金属或金属合金以形成金属网格也填充针孔。 然后可以确定图案化的ARC中的金属填充针孔的数量/密度(以及因此的孔的数量)。