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公开(公告)号:US10140248B2
公开(公告)日:2018-11-27
申请号:US15635735
申请日:2017-06-28
Applicant: D-Wave Systems Inc.
Inventor: Alexander Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul I. Bunyk , Andrew J. Berkley
Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices. A method of determining a result of a computational problem using an analog processor includes receiving at a first digital computer, including a digital processor, an instance of the computational problem defined over an input graph, wherein the input graph is non-planar; and determining a mapping of the instance of the computational problem onto the analog processor, by the digital processor.
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公开(公告)号:US20170351974A1
公开(公告)日:2017-12-07
申请号:US15641030
申请日:2017-07-03
Applicant: D-Wave Systems Inc.
Inventor: Geordie Rose , Suzanne Gildert , William G. Macready , Dominic Christoph Walliman
CPC classification number: G06N20/00 , G06K9/00986 , G06K9/6247 , G06K9/6249 , G06K9/6255 , G06N10/00
Abstract: Systems, methods and aspects, and embodiments thereof relate to unsupervised or semi-supervised features learning using a quantum processor. To achieve unsupervised or semi-supervised features learning, the quantum processor is programmed to achieve Hierarchal Deep Learning (referred to as HDL) over one or more data sets. Systems and methods search for, parse, and detect maximally repeating patterns in one or more data sets or across data or data sets. Embodiments and aspects regard using sparse coding to detect maximally repeating patterns in or across data. Examples of sparse coding include L0 and L1 sparse coding. Some implementations may involve appending, incorporating or attaching labels to dictionary elements, or constituent elements of one or more dictionaries. There may be a logical association between label and the element labeled such that the process of unsupervised or semi-supervised feature learning spans both the elements and the incorporated, attached or appended label.
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公开(公告)号:US20170300454A1
公开(公告)日:2017-10-19
申请号:US15635735
申请日:2017-06-28
Applicant: D-Wave Systems Inc.
Inventor: Alexander Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F.H. Steininger , Paul I. Bunyk , Andrew J. Berkley
Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
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公开(公告)号:US20170098682A1
公开(公告)日:2017-04-06
申请号:US15289782
申请日:2016-10-10
Applicant: D-Wave Systems Inc.
Inventor: Eric Ladizinsky , Geordie Rose , Jeremy P. Hilton , Eugene Dantsker , Byong Hyop Oh
CPC classification number: H01L27/18 , B82Y10/00 , G06N99/002 , H01L28/24 , H01L39/025 , H01L39/223 , H01L39/2406 , H01L39/2493 , Y10S977/707 , Y10S977/723 , Y10S977/943
Abstract: Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
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公开(公告)号:US20150006443A1
公开(公告)日:2015-01-01
申请号:US14316372
申请日:2014-06-26
Applicant: D-Wave Systems Inc.
Inventor: Geordie Rose , Suzanne Gildert , William G. Macready , Dominic Christoph Walliman
CPC classification number: G06N99/005 , G06K9/00986 , G06K9/6247 , G06K9/6249 , G06K9/6255 , G06N99/002
Abstract: Systems, methods and aspects, and embodiments thereof relate to unsupervised or semi-supervised features learning using a quantum processor. To achieve unsupervised or semi-supervised features learning, the quantum processor is programmed to achieve Hierarchal Deep Learning (referred to as HDL) over one or more data sets. Systems and methods search for, parse, and detect maximally repeating patterns in one or more data sets or across data or data sets. Embodiments and aspects regard using sparse coding to detect maximally repeating patterns in or across data. Examples of sparse coding include L0 and L1 sparse coding. Some implementations may involve appending, incorporating or attaching labels to dictionary elements, or constituent elements of one or more dictionaries. There may be a logical association between label and the element labeled such that the process of unsupervised or semi-supervised feature learning spans both the elements and the incorporated, attached or appended label.
Abstract translation: 系统,方法和方面及其实施例涉及使用量子处理器学习的无监督或半监督特征。 为了实现无监督或半监督特征学习,量子处理器被编程为通过一个或多个数据集实现分层深度学习(称为HDL)。 系统和方法搜索,解析和检测一个或多个数据集或数据或数据集中的最大重复模式。 使用稀疏编码来检测数据中或跨数据的最大重复模式的实施例和方面。 稀疏编码的例子包括L0和L1稀疏编码。 一些实现可以涉及将标签附加,附加或附加到字典元素或一个或多个字典的组成元素。 标签和元素之间可能存在逻辑关联,标记为使得无监督或半监督特征学习的过程跨越了元素和合并,附加或附加的标签。
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公开(公告)号:US11526463B2
公开(公告)日:2022-12-13
申请号:US17355458
申请日:2021-06-23
Applicant: D-WAVE SYSTEMS INC.
Inventor: Alexander Maassen van den Brink , Peter Love , Mohammad H. S. Amin , Geordie Rose , David Grant , Miles F. H. Steininger , Paul I. Bunyk , Andrew J. Berkley
Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
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公开(公告)号:US20200293486A1
公开(公告)日:2020-09-17
申请号:US16859672
申请日:2020-04-27
Applicant: D-WAVE SYSTEMS INC.
Inventor: Alexander Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F.H. Steininger , Paul I. Bunyk , Andrew J. Berkley
Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
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公开(公告)号:US20190324941A1
公开(公告)日:2019-10-24
申请号:US16421211
申请日:2019-05-23
Applicant: D-WAVE SYSTEMS INC.
Inventor: Alexander Maassen van den Brink , Peter Love , Mohammad H.S. Amin , Geordie Rose , David Grant , Miles F.H. Steininger , Paul I. Bunyk , Andrew J. Berkley
Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
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公开(公告)号:US09699266B2
公开(公告)日:2017-07-04
申请号:US14162557
申请日:2014-01-23
Applicant: D-Wave Systems Inc.
Inventor: Geordie Rose , Paul I. Bunyk
CPC classification number: H04L67/34 , G06F15/7825 , G06N99/002 , H04B10/70 , H04L45/306 , H04L67/327 , H04Q11/0066 , H04Q2011/0073
Abstract: A computer system employs a network that between a data programming system and one or more superconducting programmable devices of a superconducting processor chip. Routers on the network, such as first-, second- and third-stage routers direct communications with the superconducting programmable devices. A superconducting memory register may load data signals received from a first-stage router into corresponding superconducting programmable devices. The system may employ additional superconducting chips, first-, second- or third-stage routers.
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公开(公告)号:US20170177751A1
公开(公告)日:2017-06-22
申请号:US15419083
申请日:2017-01-30
Applicant: D-Wave Systems Inc.
Inventor: William G. Macready , Geordie Rose , Thomas F.W. Mahon , Peter Love , Marshall Drew-Brook
CPC classification number: G06F17/505 , B82Y10/00 , G06F17/11 , G06N99/002
Abstract: Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.
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