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    Method for fabrication of semiconductor interconnect structure with reduced capacitance, leakage current, and improved breakdown voltage
    1.
    发明授权
    Method for fabrication of semiconductor interconnect structure with reduced capacitance, leakage current, and improved breakdown voltage 有权
    具有减小的电容，漏电流和改善的击穿电压的半导体互连结构的制造方法

    公开(公告)号：US07338908B1

    公开(公告)日：2008-03-04

    申请号：US10690084

    申请日：2003-10-20

    申请人： Daniel A. Koos ,  Steven T. Mayer ,  Heung L. Park ,  Timothy Patrick Cleary ,  Thomas Mountsier

    发明人： Daniel A. Koos ,  Steven T. Mayer ,  Heung L. Park ,  Timothy Patrick Cleary ,  Thomas Mountsier

    IPC分类号： H01L21/302

    CPC分类号： H01L21/32134 ,  H01L21/02068 ,  H01L21/321 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76883

    摘要： An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the surface of the substrate. The exposed metal may be oxidized by using solutions containing oxidizing agents such as peroxides or by using oxidizing gases such as those containing oxygen or ozone. The metal oxide produced is then removed using suitable metal oxide etching agents such as glycine. The oxidation and etching may occur in the same solution. In other embodiments, the exposed metal is directly etched without forming a metal oxide. Suitable direct metal etching agents include any number of acidic solutions. The process allows for controlled oxidation and/or etching with reduced pitting. After the metal regions are etched and recessed in the substrate surface, a conductive capping layer is formed using electroless deposition over the recessed exposed metal regions.

    摘要翻译： 描述了用于选择性地蚀刻衬底的暴露的金属表面并在金属表面上形成导电覆盖层的蚀刻工艺。 在一些实施例中，蚀刻工艺涉及暴露的金属的氧化以形成随后从衬底的表面去除的金属氧化物。 暴露的金属可以通过使用含有氧化剂如过氧化物的溶液或通过使用氧化气体例如含氧或臭氧的氧化气体来氧化。 然后使用合适的金属氧化物蚀刻剂如甘氨酸除去所产生的金属氧化物。 氧化和蚀刻可能发生在相同的溶液中。 在其它实施例中，暴露的金属被直接蚀刻而不形成金属氧化物。 合适的直接金属蚀刻剂包括任何数量的酸性溶液。 该方法允许减少点蚀的受控氧化和/或蚀刻。 在金属区域被蚀刻并凹入基板表面之后，使用无电沉积形成在凹入的暴露的金属区域上的导电覆盖层。

    Fabrication of semiconductor interconnect structure
    2.
    发明授权
    Fabrication of semiconductor interconnect structure 有权
    半导体互连结构的制造

    公开(公告)号：US07531463B2

    公开(公告)日：2009-05-12

    申请号：US11586394

    申请日：2006-10-24

    申请人： Daniel A. Koos ,  Steven T. Mayer ,  Heung L. Park ,  Timothy Patrick Cleary ,  Thomas Mountsier

    发明人： Daniel A. Koos ,  Steven T. Mayer ,  Heung L. Park ,  Timothy Patrick Cleary ,  Thomas Mountsier

    IPC分类号： H01L21/302

    CPC分类号： C23F1/18 ,  C23C18/1608 ,  C23C18/1689 ,  C23C18/1692 ,  C23C18/1696 ,  C23C18/1893 ,  C23F1/34 ,  H01L21/288 ,  H01L21/32134 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the surface of the substrate. The exposed metal may be oxidized by using solutions containing oxidizing agents such as peroxides or by using oxidizing gases such as those containing oxygen or ozone. The metal oxide produced is then removed using suitable metal oxide etching agents such as glycine. The oxidation and etching may occur in the same solution. In other embodiments, the exposed metal is directly etched without forming a metal oxide. Suitable direct metal etching agents include any number of acidic solutions. The process allows for controlled oxidation and/or etching with reduced pitting. After the metal regions are etched and recessed in the substrate surface, a conductive capping layer is formed using electroless deposition over the recessed exposed metal regions.

    摘要翻译： 描述了用于选择性地蚀刻衬底的暴露的金属表面并在金属表面上形成导电覆盖层的蚀刻工艺。 在一些实施例中，蚀刻工艺涉及暴露的金属的氧化以形成随后从衬底的表面去除的金属氧化物。 暴露的金属可以通过使用含有氧化剂如过氧化物的溶液或通过使用氧化气体例如含氧或臭氧的氧化气体来氧化。 然后使用合适的金属氧化物蚀刻剂如甘氨酸除去所产生的金属氧化物。 氧化和蚀刻可能发生在相同的溶液中。 在其它实施例中，暴露的金属被直接蚀刻而不形成金属氧化物。 合适的直接金属蚀刻剂包括任何数量的酸性溶液。 该方法允许减少点蚀的受控氧化和/或蚀刻。 在金属区域被蚀刻并凹入基板表面之后，使用无电沉积形成在凹入的暴露的金属区域上的导电覆盖层。

    FABRICATION OF SEMICONDUCTOR INTERCONNECT STRUCTURE
    5.
    发明申请
    FABRICATION OF SEMICONDUCTOR INTERCONNECT STRUCTURE 有权
    半导体互连结构的制造

    公开(公告)号：US20110223772A1

    公开(公告)日：2011-09-15

    申请号：US13116963

    申请日：2011-05-26

    申请人： Steven T. Mayer ,  Daniel A. Koos ,  Eric Webb

    发明人： Steven T. Mayer ,  Daniel A. Koos ,  Eric Webb

    IPC分类号： H01L21/306

    CPC分类号： C23F1/02 ,  C23C18/1608 ,  C23C18/1834 ,  C23F1/18 ,  C23F1/34 ,  H01L21/288 ,  H01L21/32134 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the surface of the substrate. The exposed metal may be oxidized by using solutions containing oxidizing agents such as peroxides or by using oxidizing gases such as those containing oxygen or ozone. The metal oxide produced is then removed using suitable metal oxide etching agents such as glycine. The oxidation and etching may occur in the same solution. In other embodiments, the exposed metal is directly etched without forming a metal oxide. Suitable direct metal etching agents include any number of acidic solutions. The process allows for controlled oxidation and/or etching with reduced pitting. After the metal regions are etched and recessed in the substrate surface, a conductive capping layer is formed using electroless deposition over the recessed exposed metal regions.

    摘要翻译： 描述了用于选择性地蚀刻衬底的暴露的金属表面并在金属表面上形成导电覆盖层的蚀刻工艺。 在一些实施例中，蚀刻工艺涉及暴露的金属的氧化以形成随后从衬底的表面去除的金属氧化物。 暴露的金属可以通过使用含有氧化剂如过氧化物的溶液或通过使用氧化气体例如含氧或臭氧的氧化气体来氧化。 然后使用合适的金属氧化物蚀刻剂如甘氨酸除去所产生的金属氧化物。 氧化和蚀刻可能发生在相同的溶液中。 在其它实施例中，暴露的金属被直接蚀刻而不形成金属氧化物。 合适的直接金属蚀刻剂包括任何数量的酸性溶液。 该方法允许减少点蚀的受控氧化和/或蚀刻。 在金属区域被蚀刻并凹入基板表面之后，使用无电沉积形成在凹入的暴露的金属区域上的导电覆盖层。

    Fabrication of semiconductor interconnect structure
    6.
    发明授权
    Fabrication of semiconductor interconnect structure 有权
    半导体互连结构的制造

    公开(公告)号：US07972970B2

    公开(公告)日：2011-07-05

    申请号：US11888312

    申请日：2007-07-30

    申请人： Steven T. Mayer ,  Daniel A. Koos ,  Eric Webb

    发明人： Steven T. Mayer ,  Daniel A. Koos ,  Eric Webb

    IPC分类号： H01L21/302

    CPC分类号： C23F1/02 ,  C23C18/1608 ,  C23C18/1834 ,  C23F1/18 ,  C23F1/34 ,  H01L21/288 ,  H01L21/32134 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the surface of the substrate. The exposed metal may be oxidized by using solutions containing oxidizing agents such as peroxides or by using oxidizing gases such as those containing oxygen or ozone. The metal oxide produced is then removed using suitable metal oxide etching agents such as glycine. The oxidation and etching may occur in the same solution. In other embodiments, the exposed metal is directly etched without forming a metal oxide. Suitable direct metal etching agents include any number of acidic solutions. The process allows for controlled oxidation and/or etching with reduced pitting. After the metal regions are etched and recessed in the substrate surface, a conductive capping layer is formed using electroless deposition over the recessed exposed metal regions.

    摘要翻译： 描述了用于选择性地蚀刻衬底的暴露的金属表面并在金属表面上形成导电覆盖层的蚀刻工艺。 在一些实施例中，蚀刻工艺涉及暴露的金属的氧化以形成随后从衬底的表面去除的金属氧化物。 暴露的金属可以通过使用含有氧化剂如过氧化物的溶液或通过使用氧化气体例如含氧或臭氧的氧化气体来氧化。 然后使用合适的金属氧化物蚀刻剂如甘氨酸除去所产生的金属氧化物。 氧化和蚀刻可能发生在相同的溶液中。 在其它实施例中，暴露的金属被直接蚀刻而不形成金属氧化物。 合适的直接金属蚀刻剂包括任何数量的酸性溶液。 该方法允许减少点蚀的受控氧化和/或蚀刻。 在金属区域被蚀刻并凹入基板表面之后，使用无电沉积形成在凹入的暴露的金属区域上的导电覆盖层。

    Fabrication of semiconductor interconnect structure
    7.
    发明申请
    Fabrication of semiconductor interconnect structure 有权

    公开(公告)号：US20090283499A1

    公开(公告)日：2009-11-19

    申请号：US11888312

    申请日：2007-07-30

    申请人： Steven T. Mayer ,  Daniel A. Koos ,  Eric Webb

    发明人： Steven T. Mayer ,  Daniel A. Koos ,  Eric Webb

    IPC分类号： C23F1/00

    CPC分类号： C23F1/02 ,  C23C18/1608 ,  C23C18/1834 ,  C23F1/18 ,  C23F1/34 ,  H01L21/288 ,  H01L21/32134 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the surface of the substrate. The exposed metal may be oxidized by using solutions containing oxidizing agents such as peroxides or by using oxidizing gases such as those containing oxygen or ozone. The metal oxide produced is then removed using suitable metal oxide etching agents such as glycine. The oxidation and etching may occur in the same solution. In other embodiments, the exposed metal is directly etched without forming a metal oxide. Suitable direct metal etching agents include any number of acidic solutions. The process allows for controlled oxidation and/or etching with reduced pitting. After the metal regions are etched and recessed in the substrate surface, a conductive capping layer is formed using electroless deposition over the recessed exposed metal regions.

    Electrolyte concentration control system for high rate electroplating
    8.
    发明授权
    Electrolyte concentration control system for high rate electroplating 有权
    高速电镀电解质浓度控制系统

    公开(公告)号：US09109295B2

    公开(公告)日：2015-08-18

    申请号：US12577619

    申请日：2009-10-12

    申请人： Jonathan D. Reid ,  Seshasayee Varadarajan ,  Steven T. Mayer

    发明人： Jonathan D. Reid ,  Seshasayee Varadarajan ,  Steven T. Mayer

    IPC分类号： C25D17/00 ,  C25D21/18 ,  C25D3/38 ,  C25D21/02 ,  C25D21/14 ,  C25D7/12

    CPC分类号： C25D17/00 ,  C25D3/38 ,  C25D7/123 ,  C25D17/001 ,  C25D21/02 ,  C25D21/14 ,  C25D21/18

    摘要： An electroplating apparatus for filling recessed features on a semiconductor substrate includes an electrolyte concentrator configured for concentrating an electrolyte having Cu2+ ions to form a concentrated electrolyte solution that would have been supersaturated at 20° C. The electrolyte is maintained at a temperature that is higher than 20° C., such as at least at about 40° C. The apparatus further includes a concentrated electrolyte reservoir and a plating cell, where the plating cell is configured for electroplating with concentrated electrolyte at a temperature of at least about 40° C. Electroplating with electrolytes having Cu2+ concentration of at least about 60 g/L at temperatures of at least about 40° C. results in very fast copper deposition rates, and is particularly well-suited for filling large, high aspect ratio features, such as through-silicon vias.

    摘要翻译： 用于在半导体衬底上填充凹陷特征的电镀设备包括电解质浓缩器，其被配置用于浓缩具有Cu 2+离子的电解质，以形成在20℃下已经过饱和的浓缩电解质溶液。电解质保持在高于 20℃，例如至少约40℃。该设备还包括浓缩电解质储存器和电镀池，其中电镀单元被配置为在至少约40℃的温度下用浓缩电解质电镀。 在至少约40℃的温度下，具有Cu2 +浓度至少约60g / L的电解质的电镀导致非常快的铜沉积速率，并且特别适合于填充大的高纵横比特征，例如通过 硅通孔。