公开(公告)号：US08590010B2

公开(公告)日：2013-11-19

申请号：US13302314

申请日：2011-11-22

申请人： Daniel J. Fainstein ,  Alberto Cestero ,  Subramanian S. Iyer ,  Toshiaki Kirihata ,  Norman W. Robson ,  Sami Rosenblatt

发明人： Daniel J. Fainstein ,  Alberto Cestero ,  Subramanian S. Iyer ,  Toshiaki Kirihata ,  Norman W. Robson ,  Sami Rosenblatt

IPC分类号： H03M13/05

CPC分类号： G06F21/73 ,  G06F21/44 ,  G06F2221/2103 ,  G09C1/00 ,  H04L9/3278 ,  H04L2209/127

摘要： A random intrinsic chip ID generation employs a retention fail signature. A 1st and 2nd ID are generated using testing settings with a 1st setting more restrictive than the 2nd, creating more fails in the 1st ID bit string that includes 2nd ID bit string. A retention pause time controls the number of retention fails, adjusted by a BIST engine, wherein the fail numbers satisfy a predetermined fail target. Verification confirms whether the 1st ID includes the 2nd ID bit string, the ID being the one used for authentication. Authentication is enabled by a 3rd ID with intermediate condition such that 1st ID includes 3rd ID bit string and 3rd ID includes 2nd ID bit string. The intermediate condition includes a guard-band to eliminate bit instability problem near the 1st and 2nd ID boundary. The intermediate condition is changed at each ID read operation, resulting in a more secure identification.

摘要翻译： 随机内在芯片ID生成采用保留失败签名。 使用测试设置生成第1和第2个ID，第一个设置比第二个设置的限制要大于第二个设置，在包含第二个ID位串的第一个ID位字符串中创建更多的故障。 保留暂停时间控制由BIST引擎调整的保留失败次数，其中失败号码满足预定的失败目标。 验证确认第一ID是否包含第二ID位字符串，该ID是用于认证的ID。 认证由具有中间条件的第三ID启用，使得第一ID包括第三ID位串，第三ID包括第二ID位串。 中间条件包括用于消除第1和第2 ID边界附近的位不稳定性问题的保护带。 在每次ID读取操作中改变中间条件，导致更安全的识别。

公开(公告)号：US20130133031A1

公开(公告)日：2013-05-23

申请号：US13302314

申请日：2011-11-22

申请人： Daniel J. Fainstein ,  Alberto Cestero ,  Subramanian S. Iyer ,  Toshiaki Kirihata ,  Norman W. Robson ,  Sami Rosenblatt

发明人： Daniel J. Fainstein ,  Alberto Cestero ,  Subramanian S. Iyer ,  Toshiaki Kirihata ,  Norman W. Robson ,  Sami Rosenblatt

IPC分类号： G06F21/00

CPC分类号： G06F21/73 ,  G06F21/44 ,  G06F2221/2103 ,  G09C1/00 ,  H04L9/3278 ,  H04L2209/127

摘要： A random intrinsic chip ID generation employs a retention fail signature. A 1st and 2nd ID are generated using testing settings with a 1st setting more restrictive than the 2nd, creating more fails in the 1st ID bit string that includes 2nd ID bit string. A retention pause time controls the number of retention fails, adjusted by a BIST engine, wherein the fail numbers satisfy a predetermined fail target. Verification confirms whether the 1st ID includes the 2nd ID bit string, the ID being the one used for authentication. Authentication is enabled by a 3rd ID with intermediate condition such that 1st ID includes 3rd ID bit string and 3rd ID includes 2nd ID bit string. The intermediate condition includes a guard-band to eliminate bit instability problem near the 1st and 2nd ID boundary. The intermediate condition is changed at each ID read operation, resulting in a more secure identification.

摘要翻译： 随机内在芯片ID生成采用保留失败签名。 使用测试设置生成第1和第2个ID，第一个设置比第二个设置的限制要大于第二个设置，在包含第二个ID位串的第一个ID位字符串中创建更多的故障。 保留暂停时间控制由BIST引擎调整的保留失败次数，其中失败号码满足预定的失败目标。 验证确认第一ID是否包含第二ID位字符串，该ID是用于认证的ID。 认证由具有中间条件的第三ID启用，使得第一ID包括第三ID位串，第三ID包括第二ID位串。 中间条件包括用于消除第1和第2 ID边界附近的位不稳定性问题的保护带。 在每次ID读取操作中改变中间条件，导致更安全的识别。