Soft errors handling in EEPROM devices
    2.
    发明授权
    Soft errors handling in EEPROM devices 失效
    EEPROM器件中的软错误处理

    公开(公告)号:US07437631B2

    公开(公告)日:2008-10-14

    申请号:US10917870

    申请日:2004-08-13

    IPC分类号: G11C29/00

    摘要: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.

    摘要翻译: 正常使用固态存储器(如EEP​​ROM或闪存EEPROM)时会发生软错误。 存储器单元的编程阈值电压从原来的预期电平漂移导致软错误。 在正常读取期间,最初不容易检测到该误差,直到累积漂移变得如此严重以致其发展为硬错误。 数据可能会丢失,如果这些硬错误足够的可以在存储器中发出可用的纠错码。 一种存储器件及其技术能够在整个使用存储器件的过程中检测这些漂移并且将每个存储器单元的阈值电压基本上保持在其预期的水平,从而抵抗将软错误发展成硬错误。

    Soft errors handling in EEPROM devices
    3.
    发明授权
    Soft errors handling in EEPROM devices 有权
    EEPROM器件中的软错误处理

    公开(公告)号:US07839685B2

    公开(公告)日:2010-11-23

    申请号:US12572098

    申请日:2009-10-01

    IPC分类号: G11C16/06 G11C16/04

    摘要: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.

    摘要翻译: 正常使用固态存储器(如EEP​​ROM或闪存EEPROM)时会发生软错误。 存储器单元的编程阈值电压从原来的预期电平漂移导致软错误。 在正常读取期间,最初不容易检测到该误差,直到累积漂移变得如此严重以致其发展为硬错误。 数据可能会丢失,如果这些硬错误足够的可以在存储器中发出可用的纠错码。 一种存储器件及其技术能够在整个使用存储器件的过程中检测这些漂移并且将每个存储器单元的阈值电压基本上保持在其预期的水平,从而抵抗将软错误发展成硬错误。

    Soft Errors Handling in EEPROM Devices
    7.
    发明申请
    Soft Errors Handling in EEPROM Devices 有权
    EEPROM设备中的软错误处理

    公开(公告)号:US20100020616A1

    公开(公告)日:2010-01-28

    申请号:US12572098

    申请日:2009-10-01

    IPC分类号: G11C16/04

    摘要: Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.

    摘要翻译: 正常使用固态存储器(如EEP​​ROM或闪存EEPROM)时会发生软错误。 存储器单元的编程阈值电压从原来的预期电平漂移导致软错误。 在正常读取期间,最初不容易检测到该误差,直到累积漂移变得如此严重以致其发展为硬错误。 数据可能会丢失,如果这些硬错误足够的可以在存储器中发出可用的纠错码。 一种存储器件及其技术能够在整个使用存储器件的过程中检测这些漂移并且将每个存储器单元的阈值电压基本上保持在其预期的水平,从而抵抗将软错误发展成硬错误。

    Flash EEPROM array data and header file structure
    10.
    发明授权
    Flash EEPROM array data and header file structure 失效
    闪存EEPROM阵列数据和头文件结构

    公开(公告)号:US5471478A

    公开(公告)日:1995-11-28

    申请号:US401942

    申请日:1995-03-10

    摘要: A file structure employed in a flash electrically erasable and programmable read only memory ("EEPROM") system and aspects of forming and using certain data fields within such a file structure. An array of rows and columns of EEPROM memory cells is divided into blocks of cells that are separately addressable for the purpose of erasing an entire block of cells at the same time. Each block contains several rows of cells with certain columns thereof storing a sector of data, typically 512 bytes of data, and other columns of cells within the same rows being used as spare cells to replace any defective sector data cells and store overhead (header) information about the block and the data sector. Such overhead information includes pointers to locations of any defective sector data cells within the block, whether the block has been mapped out in favor of another block, error correction codes for the sector data and the header information, and other similar types of information.

    摘要翻译: 在闪存电可擦除和可编程只读存储器(“EEPROM”)系统中采用的文件结构以及在这样的文件结构内形成和使用某些数据字段的方面。 EEPROM存储器单元的行和列的阵列被划分为可单独寻址以便同时擦除整个单元块的单元的单元块。 每个块包含几行单元,其中某些列存储数据扇区(通常为512字节的数据),同一行内的其他单元格列用作备用单元以替代任何缺陷扇区数据单元并存储开销(标题) 关于块和数据扇区的信息。 这种开销信息包括指向块内的任何缺陷扇区数据单元的位置的指针,该块是否被映射到有利于另一个块,扇区数据的纠错码和头部信息以及其他类似类型的信息。