Digital synthesizer
    1.
    发明授权
    Digital synthesizer 失效
    数字合成器

    公开(公告)号:US6078629A

    公开(公告)日:2000-06-20

    申请号:US228140

    申请日:1999-01-11

    摘要: A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip, a DIF (digital intermediate frequency) chip, a single prccessor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.

    摘要翻译: 用于与无线用户通信系统中的基站进行无线通信的用户单元包括FIR芯片,DIF(数字中频)芯片,单个处理器芯片和无线电装置。 处理器芯片对数字语音输入信号进行转码以提供数字输入符号; 解调从基站接收的输出信号以提供数字输出符号; 并从数字输出符号合成数字语音输出信号。 FIR芯片FIR对数字输入符号进行滤波,并产生用于对处理器芯片中的代码转换和合成操作进行定时的定时信号。 DIF芯片通过直接数字合成(DDS)数字合成数字中频信号,并用滤波后的输入符号对数字中频信号进行调制,以提供调制中频输入​​信号。 无线电进一步处理调制的输入信号以传输到基站。

    FIR chip for use in a wireless subscriber unit
    3.
    发明授权
    FIR chip for use in a wireless subscriber unit 失效
    FIR芯片用于无线用户单元

    公开(公告)号:US06724851B2

    公开(公告)日:2004-04-20

    申请号:US10412456

    申请日:2003-04-11

    IPC分类号: H04L2300

    摘要: A FIR chip is used in a wireless subscriber unit. The subscriber unit includes a processor for transcoding an input signal to provide digital input symbols. A received output signal is demodulated. Digital output symbols are synthesized from the demodulated output signal processor and filtered digital input symbols are provided. An internal address decoder decodes to allow the processor to access internal functions of the FIR chip. A control and status register allows the processor to read the status of and control the internal functions of the FIR chip. A FIR filter filters the digital input symbols. A transmit timer controls timing which allows the processor to control the FIR filter. A receive timer generates timing signals for timing transcoding operations and synthesizing operations connected to the processor.

    摘要翻译: FIR芯片用于无线用户单元。 用户单元包括用于对输入信号进行代码转换以提供数字输入符号的处理器。 接收到的输出信号被解调。 从解调输出信号处理器合成数字输出符号并提供经过滤波的数字输入符号。 内部地址解码器解码以允许处理器访问FIR芯片的内部功能。 控制和状态寄存器允许处理器读取FIR芯片的内部功能状态并控制其内部功能。 FIR滤波器对数字输入符号进行滤波。 发送定时器控制允许处理器控制FIR滤波器的定时。 接收定时器产生用于定时代码转换操作的定时信号和连接到处理器的合成操作。