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    Bone repair device and method
    3.
    发明授权
    Bone repair device and method 有权
    骨修复装置及方法

    公开(公告)号：US07914536B2

    公开(公告)日：2011-03-29

    申请号：US11077910

    申请日：2005-03-11

    申请人： Joel MacDonald ,  Jonathan Rose

    发明人： Joel MacDonald ,  Jonathan Rose

    IPC分类号： A61B17/88

    CPC分类号： A61B17/7037 ,  A61B17/66 ,  A61B17/7008 ,  A61B17/7032 ,  A61B17/7077

    摘要： A device for repairing a bone disorder using a polyaxial screw. The device has a pivoted lever mounted rotatably to an extension of a bone screw and which extends essentially at right angles to the longitudinal direction of the extension to which it is mounted and is in contact with a stop on the other extension associated with the vertebral body to be repositioned. The extension that acts on the polyaxial bone screw comprises a longitudinal sleeve, a rod, preferably threaded, extending from within the sleeve and moveable within the sleeve, and a contact surface disposed on the end of the threaded rod which is configured to transmit a force against the bone screw to prevent polyaxial movement of the polyaxial bone screw for as long as the force is transmitted.

    摘要翻译： 使用多轴螺丝修复骨骼障碍的装置。 该装置具有可旋转地安装到骨螺钉的延伸部的枢转杆，并且其基本上与其所安装的延伸部的纵向方向成直角延伸，并且与与椎体相关联的另一延伸部上的止动件接触 被重新定位。 作用在多轴骨螺钉上的延伸部分包括一个纵向套筒，一个优选为螺纹的杆，其从套筒内延伸并且能够在套筒内移动，以及设置在螺杆的端部上的接触表面， 抵抗骨螺钉，以防止多轴骨螺钉的多轴运动，只要力被传递。

    Bone repair device and method
    4.
    发明申请
    Bone repair device and method 有权
    骨修复装置及方法

    公开(公告)号：US20060217735A1

    公开(公告)日：2006-09-28

    申请号：US11077910

    申请日：2005-03-11

    申请人： Joel MacDonald ,  Jonathan Rose

    发明人： Joel MacDonald ,  Jonathan Rose

    IPC分类号： A61B17/58

    CPC分类号： A61B17/7037 ,  A61B17/66 ,  A61B17/7008 ,  A61B17/7032 ,  A61B17/7077

    摘要： A device for repairing a bone disorder using a polyaxial screw. The device has a pivoted lever mounted rotatably to an extension of a bone screw and which extends essentially at right angles to the longitudinal direction of the extension to which it is mounted and is in contact with a stop on the other extension associated with the vertebral body to be repositioned. The extension that acts on the polyaxial bone screw comprises a longitudinal sleeve, a rod, preferably threaded, extending from within the sleeve and moveable within the sleeve, and a contact surface disposed on the end of the threaded rod which is configured to transmit a force against the bone screw to prevent polyaxial movement of the polyaxial bone screw for as long as the force is transmitted.

    摘要翻译： 使用多轴螺丝修复骨骼障碍的装置。 该装置具有可旋转地安装到骨螺钉的延伸部的枢转杆，并且其基本上与其所安装的延伸部的纵向方向成直角延伸，并且与与椎体相关联的另一延伸部上的止动件接触 被重新定位。 作用在多轴骨螺钉上的延伸部分包括一个纵向套筒，一个优选为螺纹的杆，其从套筒内延伸并且能够在套筒内移动，以及设置在螺杆的端部上的接触表面， 抵抗骨螺钉，以防止多轴骨螺钉的多轴运动，只要力被传递。

    Heterogeneous interconnection architecture for programmable logic devices
    5.
    发明授权
    Heterogeneous interconnection architecture for programmable logic devices 有权
    用于可编程逻辑器件的异构互连架构

    公开(公告)号：US06590419B1

    公开(公告)日：2003-07-08

    申请号：US09478097

    申请日：1999-10-12

    申请人： Vaughn Betz ,  Jonathan Rose

    发明人： Vaughn Betz ,  Jonathan Rose

    IPC分类号： H03K19177

    CPC分类号： H03K19/17736 ,  H03K19/17704

    摘要： An interconnection architecture for programmable logic devices (PLDs) is presented in which heterogeneous interconnect resources can be programmably connected to function blocks in accordance with two or more operational parameters, such as, for example, signal propagation speed, circuit area, signal routing flexibility, and PLD reliability. Programmable interconnect resources include unbalanced multiplexers, different types of interface buffers, and signal wires of different widths and different wire-to-wire spacings.

    摘要翻译： 提出了一种用于可编程逻辑器件（PLD）的互连结构，其中异构互连资源可以根据两个或多个操作参数（例如信号传播速度，电路面积，信号路由灵活性）可编程地连接到功能块， 和PLD可靠性。 可编程互连资源包括不平衡多路复用器，不同类型的接口缓冲器和不同宽度和不同线对线间距的信号线。

    Complementary architecture for field-programmable gate arrays
    6.
    发明授权
    Complementary architecture for field-programmable gate arrays 失效
    现场可编程门阵列的互补架构

    公开(公告)号：US5537341A

    公开(公告)日：1996-07-16

    申请号：US387402

    申请日：1995-02-10

    申请人： Jonathan Rose ,  Vaughn Betz

    发明人： Jonathan Rose ,  Vaughn Betz

    IPC分类号： G06F17/50 ,  G06F17/00

    CPC分类号： G06F17/5054

    摘要： The use of more than one field-programmable gate array design with a given logic capacity produces advantages over the use of a single field-programmable gate array design. The designs of the field-programmable gate arrays in the family are be selected so that each field-programmable gate array design advantageously implements a different type of circuit. This use can select from the family of FPGAs with the same logic capacity such that the circuits can on average be implemented faster and/or in a smaller area.

    摘要翻译： 使用具有给定逻辑容量的多个现场可编程门阵列设计产生优于使用单个现场可编程门阵列设计的优点。 可以选择族中的现场可编程门阵列的设计，使得每个现场可编程门阵列设计有利地实现不同类型的电路。 这种使用可以从具有相同逻辑容量的FPGA系列中进行选择，使得电路平均可以更快地实现和/或在较小的区域中实现。

    Automatic generation of programmable logic device architectures
    7.
    发明授权
    Automatic generation of programmable logic device architectures 有权
    自动生成可编程逻辑器件架构

    公开(公告)号：US07051313B1

    公开(公告)日：2006-05-23

    申请号：US10641193

    申请日：2003-08-13

    申请人： Vaughn Betz ,  Jonathan Rose

    发明人： Vaughn Betz ,  Jonathan Rose

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5054

    摘要： An “architecture generation engine” is operative with a CAD system to implement circuits into PLD (programmable logic device) architectures and to evaluate performances of different architectures. The architecture generation engine converts a high level, easily specified description of a PLD architecture into a highly detailed, complete PLD architecture database that can be used by a CAD toolset to map a circuit netlist into a PLD. The architecture generation engine also enables performance evaluation of a wide variety of PLD architectures for given benchmark circuits.

    摘要翻译： “架构生成引擎”与CAD系统一起工作，将电路实现为PLD（可编程逻辑器件）架构，并评估不同架构的性能。 架构生成引擎将PLD架构的高级别，易于指定的描述转换为高度详细，完整的PLD架构数据库，可由CAD工具集使用，将电路网表映射到PLD。 架构生成引擎还可以为给定基准电路的各种PLD架构进行性能评估。

    Automatic generation of programmable logic device architectures
    8.
    发明授权
    Automatic generation of programmable logic device architectures 有权
    自动生成可编程逻辑器件架构

    公开(公告)号：US06631510B1

    公开(公告)日：2003-10-07

    申请号：US09429013

    申请日：1999-10-29

    申请人： Vaughn Betz ,  Jonathan Rose

    发明人： Vaughn Betz ,  Jonathan Rose

    IPC分类号： G06F1750

    CPC分类号： G06F17/5054

    摘要： The invention consists of a new component called the Architecture Generation Engine added to the CAD system for implementing circuits into PLD architectures and for evaluating performances of different architectures. The Architecture Generation Engine converts a high-level, easily specified description of a PLD architecture into the highly detailed, complete PLD architecture database required by the internals of the CAD toolset in order to map a circuit netlist into the PLD. The Architecture Generation Engine also enables the performance evaluation of a wide variety of PLD architectures for given benchmark circuits.

    摘要翻译： 本发明包括一个新的组件，称为建筑生成引擎，被添加到CAD系统中，用于将电路实现到PLD架构中，并用于评估不同架构的性能。 架构生成引擎将PLD架构的高级易于指定的描述转换为CAD工具集内部所需的高度详细，完整的PLD体系结构数据库，以便将电路网表映射到PLD。 架构生成引擎还可以对给定基准电路的各种PLD架构进行性能评估。

    Multi-logic device systems having partial crossbar and direct interconnection architectures
    9.
    发明授权
    Multi-logic device systems having partial crossbar and direct interconnection architectures 有权
    具有部分交叉和直接互连架构的多逻辑器件系统

    公开(公告)号：US06604230B1

    公开(公告)日：2003-08-05

    申请号：US09248084

    申请日：1999-02-09

    申请人： Mohammed A. S. Khalid ,  Jonathan Rose

    发明人： Mohammed A. S. Khalid ,  Jonathan Rose

    IPC分类号： G06F1750

    CPC分类号： G06F17/5027 ,  G06F15/7867

    摘要： Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing architecture, which is the manner in which wires, FPGAs and Field-Programmable Interconnect Devices (FPIDs) are connected. The architecture disclosed uses a mixture of hardwired and programmable connections for interconnecting the FPGAs. A hardwired connection is a direct connection between a pair of FPGA I/O pins. A programmable connection refers to the scheme in which pair of FPGA I/O pins are connected using an programmable interconnect device. In the architecture disclosed, the I/O pins in each FPGA are divided into two groups: hardwired connections and programmable connections. The pins in the first group connect to other FPGAs and the pins in the second group connect to FPIDs. The FPGAs and FPIDs are interconnected using a partial crossbar architecture.

    摘要翻译： 多FPGA系统（MFS）用作定制计算机，逻辑仿真器和快速原型车。 这些系统的一个关键方面是其可编程路由架构，其中线路，FPGA和现场可编程互连设备（FPID）的连接方式。 所公开的架构使用硬连线和可编程连接的混合来互连FPGA。 硬连线是一对FPGA I / O引脚之间的直接连接。 可编程连接是指使用可编程互连器件连接一对FPGA I / O引脚的方案。 在所公开的架构中，每个FPGA中的I / O引脚分为两组：硬连线和可编程连接。 第一组中的引脚连接到其他FPGA，第二组中的引脚连接到FPID。 FPGA和FPID使用部分交叉结构互连。