Method for deposition of silicon oxide on a wafer
    1.
    发明授权
    Method for deposition of silicon oxide on a wafer 失效
    在晶圆上沉积氧化硅的方法

    公开(公告)号:US4988533A

    公开(公告)日:1991-01-29

    申请号:US203583

    申请日:1988-05-27

    IPC分类号: C23C16/40

    CPC分类号: C23C16/402

    摘要: A processing apparatus and method for depositing a silicon oxide layer on a temperature sensitive wafer utilizing a single process chamber provide nitrous oxide gas to the chamber with the excitation energy being provided by a remotely generated plasma while supplying silane gas in combination with illuminating the wafer with an in situ generated ultraviolet energy to produce the silicon oxide layer.

    摘要翻译: 使用单个处理室在温度敏感晶片上沉积氧化硅层的处理装置和方法向室提供氧化亚氮气体,其中激发能由远程产生的等离子体提供,同时将硅烷气体与照射晶片同时 原位产生的紫外线能量以产生氧化硅层。

    Method for passivating wafer
    6.
    发明授权
    Method for passivating wafer 失效
    钝化晶圆的方法

    公开(公告)号:US4855160A

    公开(公告)日:1989-08-08

    申请号:US203563

    申请日:1988-05-26

    摘要: A high pressure processing apparatus and method which is compatible with a system wherein wafers are largely transported and processed under vacuum. The pressure vessel can be extremely small, i.e. has a total pressurized volume of which almost all interior points are within one or two centimeters of one of the workpiece or wafers which may be loaded into the chamber. HgCdTe is passivated by utilizing oxygen and water vapor for oxidation or a source of sulfur for sulfidization. The wafers and the gases are heated by a heater located on the vertical walls of the process chamber.

    摘要翻译: 一种与其中晶片在真空下大量输送和处理的系统兼容的高压处理设备和方法。 压力容器可以非常小,即具有总加压体积,其几乎所有内部​​点可以装载到腔室中的工件或晶片中的一个或两厘米。 HgCdTe通过利用氧气和水蒸气进行氧化而被钝化,或硫化来源被硫化。 晶片和气体由位于处理室垂直壁上的加热器加热。

    Method for dry etching openings in integrated circuit layers
    8.
    发明授权
    Method for dry etching openings in integrated circuit layers 失效
    集成电路层干蚀刻开孔方法

    公开(公告)号:US5157000A

    公开(公告)日:1992-10-20

    申请号:US652506

    申请日:1991-02-08

    摘要: A process is disclosed through which vias (50) can be formed by the reaction of an etchant species (52) with a mercury cadmium telluride (HgCdTe) or zinc sulfide (ZnS) layer (42). The activating gases (20) are preferably a hydrogen gas or a methane gas which is excited in a diode plasma reactor (100) which has an RF power source (13) applied to one of two parallel electrodes. The etching occurs in selected areas in a photoresist pattern (44) residing over the ZnS or HgCdTe layer (42). Wet etching the layer (42) with a wet etchant (54) following the dry etching, improves the via (50) by making the walls (48) smoother, and allowing for expansion of the vias (50) to a dimension necessary for proper operation of a HgCdTe-based infrared detector.

    摘要翻译: 公开了通过蚀刻剂物质(52)与碲化汞镉(HgCdTe)或硫化锌(ZnS)层(42)的反应可以形成通孔(50)的方法。 活性气体(20)优选为在二次电等离子体反应器(100)中激发的氢气或甲烷气体,二极管等离子体反应器(100)具有施加到两个平行电极之一的RF电源(13)。 蚀刻发生在驻留在ZnS或HgCdTe层(42)上的光致抗蚀剂图案(44)中的选定区域中。 在干蚀刻之后用湿蚀刻剂(54)湿蚀刻层(42),通过使壁(48)更平滑并允许将通孔(50)膨胀到适当的尺寸所需的尺寸来改善通孔(50) 基于HgCdTe的红外探测器的运行。

    Method for via formation and type conversion in group II and group VI
materials
    10.
    发明授权
    Method for via formation and type conversion in group II and group VI materials 失效
    Ⅱ组和VI组材料通孔形成和类型转换的方法

    公开(公告)号:US5318666A

    公开(公告)日:1994-06-07

    申请号:US049755

    申请日:1993-04-19

    摘要: A method of forming an n-p junction in a body (44, 44a, 44b) formed of Group II and Group VI elements. The body (44, 44a, 44b) initially is of p-type conductivity characteristic, and a dry reactive etching process is employed for forming a via (60, 60a, 60b) in the body by a chemical reaction which is also effective to type convert a portion of the body adjacent the via. An n-doped region (64, 64a, 64b) is thereby formed within the body around the via and between the via and the remaining, p-doped region of the body, thereby defining an n-p junction. In one embodiment, the body is mounted on an electrical device (50, 50a, 50b) having an input contact pad (58, 58a, 58b), and an electrically conductive layer (62, 46a, 90) is formed in connection with the contact pad and the n-doped region adjacent the via. In one application, a plurality of the n-p doped via junctions are formed in laterally spaced orientation for providing an array of infrared radiation sensitive photodiodes (24, 24a, 24b), the n-doped region of each diode having electrical connection with a respective contact pad of the electrical device.

    摘要翻译: 一种在由组II和VI组成的体(44,44a,44b)中形成n-p结的方法。 本体(44,44a,44b)最初是p型导电特性,采用干式反应蚀刻工艺,通过化学反应在体内形成通孔(60,60a,60b) 转换邻近通孔的身体的一部分。 因此,在体内围绕通孔和通孔与本体的剩余的p掺杂区域之间在体内形成n掺杂区域(64,64a,64b),由此限定n-p结。 在一个实施例中,主体安装在具有输入接触焊盘(58,58a,58b)的电气设备(50,50a,50b)上,并且导电层(62,46a,90)与 接触焊盘和邻近通孔的n掺杂区域。 在一个应用中,多个np掺杂的通孔结形成为横向间隔的取向以提供红外辐射敏感光电二极管阵列(24,24a,24b),每个二极管的n掺杂区域与相应的触点电连接 电气设备的垫。