Systems and methods to prevent system crashes due to link failure in memory mirroring mode

    公开(公告)号:US10802934B2

    公开(公告)日:2020-10-13

    申请号:US16004996

    申请日:2018-06-11

    摘要: Systems and methods for preventing system crashes due to memory link failure in memory mirroring mode in an information handling system (IHS). The IHS may include a first memory device, a second memory device, and an integrated memory controller (IMC). The IMC may issue write transactions to both the first and second memory devices and issue read transactions to the first memory device when the IMC is in memory mirroring mode. The IMC may transmit a system management interrupt (SMI) with an IMC error to a basic input/output system (BIOS) when a persistent uncorrected IMC error is detected within the first memory device. The BIOS may perform a memory mirror failover process that may cause the IMC to issue the write transactions and the read transactions to the second memory device when the IMC error is a fatal memory link error.

    SYSTEMS AND METHODS TO PREVENT SYSTEM CRASHES DUE TO LINK FAILURE IN MEMORY MIRRORING MODE

    公开(公告)号:US20190377650A1

    公开(公告)日:2019-12-12

    申请号:US16004996

    申请日:2018-06-11

    摘要: Systems and methods for preventing system crashes due to memory link failure in memory mirroring mode in an information handling system (IHS). The IHS may include a first memory device, a second memory device, and an integrated memory controller (IMC). The IMC may issue write transactions to both the first and second memory devices and issue read transactions to the first memory device when the IMC is in memory mirroring mode. The IMC may transmit a system management interrupt (SMI) with an IMC error to a basic input/output system (BIOS) when a persistent uncorrected IMC error is detected within the first memory device. The BIOS may perform a memory mirror failover process that may cause the IMC to issue the write transactions and the read transactions to the second memory device when the IMC error is a fatal memory link error.

    Memory mirroring in an information handling system

    公开(公告)号:US11275660B2

    公开(公告)日:2022-03-15

    申请号:US16112942

    申请日:2018-08-27

    IPC分类号: G06F11/20 G06F3/06

    摘要: A method, an information handling system (IHS) and a memory mirroring system for operating a mirrored memory. The method includes detecting, via a memory controller, at least one uncorrectable data error (UCDE) in a first memory device. In response to detecting the at least one UCDE, a UCDE event counter is retrieved that tracks the number of UCDE events that have occurred and a UCDE event threshold is retrieved corresponding to a maximum number of allowed UCDE events. The method further includes determining if the UCDE event counter is greater than the UCDE event threshold and in response to determining that the UCDE event counter is not greater than the UCDE event threshold, continuing writing of data to the first memory device via a first memory channel and continuing writing of the data to a second memory device via a second memory channel to create a mirror of the data.

    METHODS FOR MANAGING PERFORMANCE STATES IN AN INFORMATION HANDLING SYSTEM
    5.
    发明申请
    METHODS FOR MANAGING PERFORMANCE STATES IN AN INFORMATION HANDLING SYSTEM 有权
    在信息处理系统中管理性能状态的方法

    公开(公告)号:US20160098338A1

    公开(公告)日:2016-04-07

    申请号:US14964356

    申请日:2015-12-09

    IPC分类号: G06F11/34 G06F11/30 G06F9/455

    摘要: An information handling system (IHS) is disclosed wherein the system includes a processor associated with at least one performance state (P-state), and a memory in communication with the processor. The memory is operable to store a virtualization software and a basic input/out system (BIOS). The BIOS is configured to report a parameter of the P-state to the virtualization software. In addition, the BIOS is configured to transition the processor into a desired P-state. A method for managing performance states in an information handling system (IHS) is further disclosed wherein the method includes providing a basic input/output system (BIOS) in communication with a processor, the processor associated with an at least one performance state (P-state) and reporting a parameter of the at least one P-state to a virtualization software via the BIOS. The method further includes transitioning the processor to a desired P-state via the BIOS.

    摘要翻译: 公开了一种信息处理系统(IHS),其中所述系统包括与至少一个性能状态(P状态)相关联的处理器以及与所述处理器通信的存储器。 存储器可操作地存储虚拟化软件和基本输入/输出系统(BIOS)。 BIOS配置为向虚拟化软件报告P状态的参数。 此外,BIOS被配置为将处理器转换成期望的P状态。 还公开了一种用于管理信息处理系统(IHS)中的性能状态的方法,其中所述方法包括提供与处理器通信的基本输入/输出系统(BIOS),所述处理器与至少一个性能状态(P- 状态),并且经由BIOS向虚拟化软件报告所述至少一个P状态的参数。 该方法还包括经由BIOS将处理器转换到期望的P状态。