公开(公告)号：US20080136552A1

公开(公告)日：2008-06-12

申请号：US11875604

申请日：2007-10-19

申请人： Dong Young Kim ,  Jae Kyoung Mun ,  Dong Suk Jun ,  Hae Cheon Kim

发明人： Dong Young Kim ,  Jae Kyoung Mun ,  Dong Suk Jun ,  Hae Cheon Kim

IPC分类号： H03H7/38

CPC分类号： H01P5/08 ,  H01L2924/19107

摘要： Provided is a microwave module having a converter for improving transmission characteristics in a millimeter-wave band. When a microstrip transmission line and a conductor-backed coplanar waveguide (CBCPW) transmission line are connected by wire bonding, a change in impedance caused by wire bonding and an abrupt change in electric field components between the two transmission lines are reduced by the converter. Therefore, insertion loss and return loss are reduced, and transmission characteristics in a millimeter-wave band are improved.

摘要翻译： 提供了一种具有用于改善毫米波段中的传输特性的转换器的微波模块。 当微带传输线和导体背面共面波导（CBCPW）传输线通过引线接合连接时，通过引线键合引起的阻抗变化和两条传输线之间的电场分量的突然变化被转换器减少。 因此，降低了插入损耗和回波损耗，提高了毫米波段的传输特性。

公开(公告)号：US07548143B2

公开(公告)日：2009-06-16

申请号：US11875604

申请日：2007-10-19

申请人： Dong Young Kim ,  Jae Kyoung Mun ,  Dong Suk Jun ,  Hae Cheon Kim

发明人： Dong Young Kim ,  Jae Kyoung Mun ,  Dong Suk Jun ,  Hae Cheon Kim

IPC分类号： H01P3/08 ,  H03H7/38

CPC分类号： H01P5/08 ,  H01L2924/19107

摘要： Provided is a microwave module having a converter for improving transmission characteristics in a millimeter-wave band. When a microstrip transmission line and a conductor-backed coplanar waveguide (CBCPW) transmission line are connected by wire bonding, a change in impedance caused by wire bonding and an abrupt change in electric field components between the two transmission lines are reduced by the converter. Therefore, insertion loss and return loss are reduced, and transmission characteristics in a millimeter-wave band are improved.

摘要翻译： 提供了一种具有用于改善毫米波段中的传输特性的转换器的微波模块。 当微带传输线和导体背面共面波导（CBCPW）传输线通过引线接合连接时，通过引线键合引起的阻抗变化和两条传输线之间的电场分量的突然变化被转换器减少。 因此，降低了插入损耗和回波损耗，提高了毫米波段的传输特性。

公开(公告)号：US20090146724A1

公开(公告)日：2009-06-11

申请号：US12139046

申请日：2008-06-13

申请人： Jae Kyoung Mun ,  Dong Young Kim ,  Jong Won Lim ,  Ho Kyun Ahn ,  Hae Cheon Kim ,  Hyun Kyu Yu

发明人： Jae Kyoung Mun ,  Dong Young Kim ,  Jong Won Lim ,  Ho Kyun Ahn ,  Hae Cheon Kim ,  Hyun Kyu Yu

IPC分类号： H03K17/06

CPC分类号： H03K17/063 ,  H01P1/15 ,  H03K17/693 ,  H03K2017/066

摘要： Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss.

摘要翻译： 提供了一种用于毫米波段控制电路的开关电路。 毫米波段控制电路的开关电路包括设置在信号端口路径上以匹配感兴趣频率并且包括垂直于输入/输出传输线耦合的至少一个晶体管的开关单元和对称地布置在其中的多个接地通孔 输入/输出传输线的上部和下部; 用于稳定开关电池的偏置的电容器; 以及与电容器并联耦合的偏置焊盘以控制开关单元。 因此，切换电路可能有助于通过简化其设计和布局来改善其隔离，通过使用优化的开关电池的对称结构，而不需要分开使用不同的开关元件，并且还可以通过提高产量来提高其制造成本 制造工艺和增强的集成，因为除了低插入损耗之外，可以减小集成电路的芯片尺寸。

公开(公告)号：US07671697B2

公开(公告)日：2010-03-02

申请号：US11928410

申请日：2007-10-30

申请人： Jae Kyoung Mun ,  Hae Cheon Kim ,  Dong Young Kim ,  Jong Won Lim ,  Ho Kyun Ahn ,  Hyun Kyu Yu

发明人： Jae Kyoung Mun ,  Hae Cheon Kim ,  Dong Young Kim ,  Jong Won Lim ,  Ho Kyun Ahn ,  Hyun Kyu Yu

IPC分类号： H01P1/10 ,  H01L29/80

CPC分类号： H01P1/15

摘要： Provided is a high-isolation switching device for a millimeter-wave band control circuit. By optimizing a cell structure to improve the isolation of an off-state without deteriorating the insertion loss of an on-state, it is possible to implement a high-isolation switching device useful in the design and manufacture of a millimeter-wave band control circuit such as a phase shifter or digital attenuator using switching characteristics. In addition, when a switch microwave monolithic integrated circuit (MMIC) is designed to use the switching device, it is not necessary to use a multi-stage shunt field effect transistor (FET) to improve isolation, nor to dispose an additional λ/4 transformer transmission line, inductor or capacitor near the switching device. Thus, chip size can be reduced, degree of integration can be enhanced, and manufacturing yield can be increased. Consequently, it is possible to reduce manufacturing cost.

摘要翻译： 提供了一种用于毫米波段控制电路的高隔离开关装置。 通过优化单元结构以改善断开状态的隔离而不会导致导通状态的插入损耗的恶化，可以实现用于设计和制造毫米波段控制电路的高隔离开关装置 例如使用开关特性的移相器或数字衰减器。 另外，当开关微波单片集成电路（MMIC）设计为使用开关器件时，不需要使用多级并联场效应晶体管（FET）来改善隔离度，也不需要设置额外的λ/ 4 变压器输电线路，电感器或电容器附近的开关装置。 因此，可以降低芯片尺寸，可以提高集成度，并且可以提高制造成品率。 因此，可以降低制造成本。

公开(公告)号：US08058658B2

公开(公告)日：2011-11-15

申请号：US12421130

申请日：2009-04-09

申请人： Sang-Heung Lee ,  Hae Cheon Kim ,  Dong Min Kang ,  Dong-Young Kim ,  Jae Kyoung Mun ,  Hokyun Ahn ,  Jong-Won Lim ,  Woo Jin Chang ,  Hong Gu Ji ,  Eun Soo Nam

发明人： Sang-Heung Lee ,  Hae Cheon Kim ,  Dong Min Kang ,  Dong-Young Kim ,  Jae Kyoung Mun ,  Hokyun Ahn ,  Jong-Won Lim ,  Woo Jin Chang ,  Hong Gu Ji ,  Eun Soo Nam

IPC分类号： H01L27/15

CPC分类号： H01L25/167 ,  H01L2224/0603 ,  H01L2224/45014 ,  H01L2224/48137 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/30107 ,  H01L2924/00

摘要： Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.

摘要翻译： 提供了一种高速光互连装置。 高速光互连装置包括设置在绝缘体上硅（SOI））衬底上的第一半导体芯片，发光体，光检测器和第二半导体芯片。 光发射器接收来自第一半导体芯片的电信号以输出光信号。 光检测器检测光信号，将光信号转换为电信号。 第二半导体芯片接收由光学检测器转换的电信号。

公开(公告)号：US07889023B2

公开(公告)日：2011-02-15

申请号：US12139046

申请日：2008-06-13

申请人： Jae Kyoung Mun ,  Dong Young Kim ,  Jong Won Lim ,  Ho Kyun Ahn ,  Hae Cheon Kim ,  Hyun Kyu Yu

发明人： Jae Kyoung Mun ,  Dong Young Kim ,  Jong Won Lim ,  Ho Kyun Ahn ,  Hae Cheon Kim ,  Hyun Kyu Yu

IPC分类号： H01P1/10 ,  H01P3/08

CPC分类号： H03K17/063 ,  H01P1/15 ,  H03K17/693 ,  H03K2017/066

摘要： Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss.

摘要翻译： 提供了一种用于毫米波段控制电路的开关电路。 毫米波段控制电路的开关电路包括设置在信号端口路径上以匹配感兴趣频率并且包括垂直于输入/输出传输线耦合的至少一个晶体管的开关单元和对称地布置在其中的多个接地通孔 输入/输出传输线的上部和下部; 用于稳定开关电池的偏置的电容器; 以及与电容器并联耦合的偏置焊盘以控制开关单元。 因此，切换电路可能有助于通过简化其设计和布局来改善其隔离，通过使用优化的开关电池的对称结构，而不需要分开使用不同的开关元件，并且还可以通过提高产量来提高其制造成本 制造工艺和增强的集成，因为除了低插入损耗之外，可以减小集成电路的芯片尺寸。

公开(公告)号：US08723222B2

公开(公告)日：2014-05-13

申请号：US13548522

申请日：2012-07-13

申请人： Sung Bum Bae ,  Eun Soo Nam ,  Jae Kyoung Mun ,  Sung Bock Kim ,  Hae Cheon Kim ,  Chull Won Ju ,  Sang Choon Ko ,  Jong-Won Lim ,  Ho Kyun Ahn ,  Woo Jin Chang ,  Young Rak Park

发明人： Sung Bum Bae ,  Eun Soo Nam ,  Jae Kyoung Mun ,  Sung Bock Kim ,  Hae Cheon Kim ,  Chull Won Ju ,  Sang Choon Ko ,  Jong-Won Lim ,  Ho Kyun Ahn ,  Woo Jin Chang ,  Young Rak Park

IPC分类号： H01L31/102

CPC分类号： H01L29/66446 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02647 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0883

摘要： The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.

摘要翻译： 本发明涉及一种氮化物电子器件及其制造方法，特别涉及一种氮化物电子器件及其制造方法，该氮化物电子器件及其制造方法可以通过再生技术在同一衬底上实现各种氮化物一体化结构（ 用于包括III族元素如镓（Ga），铝（Al）和铟（In））和氮（III）的III族氮化物半导体电子器件中的半绝缘氮化镓（GaN）层的外延横向过度生长：ELOG） 。

公开(公告)号：US07893462B2

公开(公告)日：2011-02-22

申请号：US11280608

申请日：2005-11-15

申请人： Jae Kyoung Mun ,  Hung Gu Ji ,  Ho Kyun Ahn ,  Hae Cheon Kim

发明人： Jae Kyoung Mun ,  Hung Gu Ji ,  Ho Kyun Ahn ,  Hae Cheon Kim

IPC分类号： H01L29/66

CPC分类号： H01L29/7785 ,  H01L29/42316

摘要： Provided are a transistor of a semiconductor device and a method of fabricating the same. The transistor of a semiconductor device includes an epitaxial substrate having a buffer layer, a first silicon (Si) planar doped layer, a first conductive layer, a second Si planar doped layer having a different dopant concentration from the first Si planar doped layer, and a second conductive layer, which are sequentially formed on a semi-insulating substrate; a source electrode and a drain electrode formed on both sides of the second conductive layer to penetrate the first Si planar doped layer to a predetermined depth to form an ohmic contact; and a gate electrode formed on the second conductive layer between the source electrode and the drain electrode to form a contact with the second conductive layer, wherein the gate electrode, the source electrode and the drain electrode are electrically insulated by an insulating layer, and a predetermined part of an upper part of the gate electrode is formed to overlap at least one of the source electrode and the drain electrode. Therefore, a maximum voltage that can be applied to the switching device is increased due to increases of a gate turn-on voltage and a breakdown voltage, and decrease of a parallel conduction component. As a result of this improved power handling capability, high-power and low-distortion characteristics and high isolation can be expected from the switching device.

摘要翻译： 提供半导体器件的晶体管及其制造方法。 半导体器件的晶体管包括具有缓冲层，第一硅（Si）平面掺杂层，第一导电层，具有与第一Si平面掺杂层不同的掺杂剂浓度的第二Si平面掺杂层的外延衬底，以及 第二导电层，其依次形成在半绝缘基板上; 源电极和漏电极，形成在第二导电层的两侧，以将第一Si平面掺杂层穿透到预定深度以形成欧姆接触; 以及形成在所述源电极和所述漏电极之间的所述第二导电层上的栅电极，以与所述第二导电层形成接触，其中所述栅电极，所述源电极和所述漏极由绝缘层电绝缘， 栅电极的上部的预定部分形成为与源电极和漏电极中的至少一个重叠。 因此，由于栅极导通电压和击穿电压的增加以及并联导通分量的降低，可以施加到开关器件的最大电压增加。 由于这种改进的功率处理能力，可以期望从开关器件获得高功率和低失真特性以及高隔离度。

公开(公告)号：US07183149B2

公开(公告)日：2007-02-27

申请号：US11180726

申请日：2005-07-14

申请人： Ho Kyun Ahn ,  Jong Won Lim ,  Hong Gu Ji ,  Woo Jin Chang ,  Jae Kyoung Mun ,  Hae Cheon Kim

发明人： Ho Kyun Ahn ,  Jong Won Lim ,  Hong Gu Ji ,  Woo Jin Chang ,  Jae Kyoung Mun ,  Hae Cheon Kim

IPC分类号： H01L21/338

CPC分类号： H01L29/66856 ,  H01L29/66462

摘要： Provided is a method of manufacturing a field effect transistor (FET). The method includes steps of: forming an ohmic metal layer on a substrate in source and drain regions; sequentially forming an insulating layer and a multilayered resist layer on the entire surface of the resultant structure and simultaneously forming resist patterns having respectively different shapes in both a first region excluding the ohmic metal layer and a second region excluding the ohmic metal layer, wherein a lowermost resist pattern is exposed in the first region, and the insulating layer is exposed in the second region; exposing the substrate and the insulating layer by simultaneously etching the exposed insulating layer and the exposed lowermost resist pattern using the resist patterns as etch masks, respectively; performing a recess process on the exposed substrate and etching the exposed insulating layer to expose the substrate; and forming gate recess regions having different etching depths from each other over the substrate, depositing a predetermined gate metal, and removing the resist patterns. In this method, transistors having different threshold voltages can be manufactured without additional mask patterns using the least number of processes, with the results that the cost of production can be reduced and the stability and productivity of semiconductor devices can be improved.

摘要翻译： 提供了制造场效应晶体管（FET）的方法。 该方法包括以下步骤：在源极和漏极区域的衬底上形成欧姆金属层; 在所得结构的整个表面上顺序地形成绝缘层和多层抗蚀剂层，并且同时形成除了欧姆金属层以外的第一区域和不包括欧姆金属层的第二区域中具有不同形状的抗蚀剂图案，其中最下面 抗蚀剂图案在第一区域中暴露，并且绝缘层在第二区域中暴露; 通过分别使用抗蚀剂图案作为蚀刻掩模，同时蚀刻暴露的绝缘层和暴露的最下面的抗蚀剂图案来暴露衬底和绝缘层; 对曝光的衬底进行凹陷处理并蚀刻暴露的绝缘层以露出衬底; 以及在衬底上形成具有彼此不同蚀刻深度的栅极凹陷区域，沉积预定的栅极金属和去除抗蚀剂图案。 在该方法中，可以使用最少数量的工艺来制造具有不同阈值电压的晶体管，而不需要额外的掩模图案，结果可以降低生产成本，并且可以提高半导体器件的稳定性和生产率。

公开(公告)号：US08697507B2

公开(公告)日：2014-04-15

申请号：US13004750

申请日：2011-01-11

申请人： Jae Kyoung Mun ,  Hong Gu Ji ,  Ho Kyun Ahn ,  Hae Cheon Kim

发明人： Jae Kyoung Mun ,  Hong Gu Ji ,  Ho Kyun Ahn ,  Hae Cheon Kim

IPC分类号： H01L21/338

CPC分类号： H01L29/7785 ,  H01L29/42316

摘要： Provided are a transistor of a semiconductor device and a method of fabricating the same. The transistor of a semiconductor device includes an epitaxial substrate having a buffer layer, a first silicon (Si) planar doped layer, a first conductive layer, a second Si planar doped layer having a different dopant concentration from the first Si planar doped layer, and a second conductive layer, which are sequentially formed on a semi-insulating substrate; a source electrode and a drain electrode formed on both sides of the second conductive layer to penetrate the first Si planar doped layer to a predetermined depth to form an ohmic contact; and a gate electrode formed on the second conductive layer between the source electrode and the drain electrode to form a contact with the second conductive layer, wherein the gate electrode, the source electrode and the drain electrode are electrically insulated by an insulating layer, and a predetermined part of an upper part of the gate electrode is formed to overlap at least one of the source electrode and the drain electrode. Therefore, a maximum voltage that can be applied to the switching device is increased due to increases of a gate turn-on voltage and a breakdown voltage, and decrease of a parallel conduction component. As a result of this improved power handling capability, high-power and low-distortion characteristics and high isolation can be expected from the switching device.

摘要翻译： 提供半导体器件的晶体管及其制造方法。 半导体器件的晶体管包括具有缓冲层，第一硅（Si）平面掺杂层，第一导电层，具有与第一Si平面掺杂层不同的掺杂剂浓度的第二Si平面掺杂层的外延衬底，以及 第二导电层，其依次形成在半绝缘基板上; 源电极和漏电极，形成在第二导电层的两侧，以将第一Si平面掺杂层穿透到预定深度以形成欧姆接触; 以及形成在所述源电极和所述漏电极之间的所述第二导电层上的栅电极，以与所述第二导电层形成接触，其中所述栅电极，所述源电极和所述漏极由绝缘层电绝缘， 栅电极的上部的预定部分形成为与源电极和漏电极中的至少一个重叠。 因此，由于栅极导通电压和击穿电压的增加以及并联导通分量的降低，可以施加到开关器件的最大电压增加。 由于这种改进的功率处理能力，可以期望从开关器件获得高功率和低失真特性以及高隔离度。