摘要:
A clock driver is provided. A first driving unit is configured with a plurality of drivers and receives a first clock signal to drive a first pumping clock. A second driving unit is configured with a plurality of drivers and receives a second clock signal to drive a second pumping clock. A charge recycling switch is connected between an output terminal of the first driving unit and an output terminal of the second driving unit. A switch controller selectively transfers an input clock signal of the first or second driving unit to the charge recycling switch in response to the first and second pumping clock signals.
摘要:
A clock driver is provided. A first driving unit is configured with a plurality of drivers and receives a first clock signal to drive a first pumping clock. A second driving unit is configured with a plurality of drivers and receives a second clock signal to drive a second pumping clock. A charge recycling switch is connected between an output terminal of the first driving unit and an output terminal of the second driving unit. A switch controller selectively transfers an input clock signal of the first or second driving unit to the charge recycling switch in response to the first and second pumping clock signals.
摘要:
An on-die thermal sensor includes an integrating analog-digital converter not requiring a negative reference voltage input. The on die thermal sensor includes a band gap unit, an integrating unit and a counting unit. The band gap unit senses a temperature to output a first voltage corresponding to the sensed temperature. The integrating unit integrates a difference between a reference voltage and a comparing voltage to output a second voltage wherein the comparing voltage has a voltage level higher than that of the reference voltage. The counting unit counts clocks of a clock signal input thereto until the second voltage reaches the first voltage, thereby outputting a thermal code corresponding to the voltage level of the first voltage.
摘要:
An on-die thermal sensor includes an integrating analog-digital converter not requiring a negative reference voltage input. The on die thermal sensor includes a band gap unit, an integrating unit and a counting unit. The band gap unit senses a temperature to output a first voltage corresponding to the sensed temperature. The integrating unit integrates a difference between a reference voltage and a comparing voltage to output a second voltage wherein the comparing voltage has a voltage level higher than that of the reference voltage. The counting unit counts clocks of a clock signal input thereto until the second voltage reaches the first voltage, thereby outputting a thermal code corresponding to the voltage level of the first voltage.
摘要:
The present invention relates to a safety management system including a JSA draw-up module configured to display a screen for drawing up a job safety analysis worksheet for job safety analysis (JSA) and to draw up the job safety analysis worksheet on the basis of the information inputted by a user; a storage module configured to store the job safety analysis worksheet drawn up by the JSA draw-up module into a database (DB) and to store task hazard information drawn up for each unit task that can be referred for the job safety analysis worksheet into a database; and a inventory module configured to manage the job safety analysis worksheet and the task hazard information stored in the storage module and to create a new job safety analysis worksheet and new task hazard information in accordance with a request from the JSA draw-up module, and a method thereof.
摘要:
An apparatus for decoding residual data based on a bit plane and a method thereof, capable of achieving a significant reduction in data traffic between a memory and a functional module in a parallel decoding system, include a variable length decoding module configured to generate residual data for each macroblock from a bit stream, divide the residual data into groups, and generate a bit plane regarding each of the groups, and a variable length decoding memory configured to store the bit plane generated from the variable length decoding module and store the residual data of the groups according to a value of the bit plane.
摘要:
A semiconductor memory device includes: a plurality of ports configured to perform a serial input/output (I/O) data communication with external devices; a plurality of banks configured to perform a parallel I/O data communication with the ports; a global data bus configured to transmit a signal between the banks and the ports; a test mode determiner configured to determine an operation mode of the semiconductor memory device by generating a test mode enable signal in response to a test mode control signal; a test I/O controller configured to transmit and receive a test signal with the ports in response to the test mode enable signal during a port test mode; and a plurality of selectors, each of which is configured to receive the test signal output from the corresponding port in series and feedback the test signal to the corresponding port.
摘要:
An On Die Thermal Sensor (ODTS) of a semiconductor memory device includes: a temperature detector for detecting an internal temperature of the semiconductor memory device to generate a temperature voltage corresponding to the detected internal temperature; a tracking ADC for outputting a digital code by comparing the temperature voltage with a tracking voltage and performing a counting operation to the result of comparison; and an operation controller for controlling operations of the temperature detector and the analog-to-digital converter, wherein the tracking ADC performs the counting operation using a first tracking scheme having a relatively large unit variation width of the digital code value during an initial tracking period and a second tracking scheme having a relatively small unit variation width of the digital code value after the initial tracking period.
摘要:
A DLL of a memory device having a normal mode and a power down mode includes a clock buffer for buffering an external clock signal to output an internal clock signal. A power down mode controller generates a power down mode control signal to define the normal mode or the power down mode in response to a clock enable signal. A source clock generation unit receives the internal clock signal to generate a DLL source clock signal under the control of the power down mode control signal. A phase update unit performs a phase update operation based on the DLL source clock signal to output a DLL clock signal.
摘要:
A multi-port memory device improves efficiency of a global data drive by controlling the global data bus to transmit data in a predetermined range. The multi-port memory device includes a global data bus; transmitters and receivers; a termination unit for controlling the global data bus to transmit the data in a range between a first voltage and a second voltage in response to an active mode signal; and a voltage generator for generating the first and the second voltages. The first voltage is higher than a ground voltage and the second voltage is lower than a power supply voltage.