公开(公告)号：US08592315B2

公开(公告)日：2013-11-26

申请号：US12711344

申请日：2010-02-24

申请人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/302 ,  H01L21/461 ,  C23F1/00 ,  C23F3/00

CPC分类号： H01L21/76819 ,  C09G1/02 ,  H01L21/31053

摘要： In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

摘要翻译： 在一个实施方案中，一种用于具有第一层和阶梯部分的基材的化学机械抛光方法。 第一层的表面位于台阶部的上表面的上方。 通过使用具有自停特性的第一浆料组合物在第一层上进行用于选择性去除台阶部分的抛光工艺，使得第一层变成具有基本平坦表面的第二层。 使用不具有自停特性的第二浆料组合物进行第二抛光处理，直到阶梯部分的上表面露出。

公开(公告)号：US20060141790A1

公开(公告)日：2006-06-29

申请号：US11321848

申请日：2005-12-28

申请人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/76819 ,  C09G1/02 ,  H01L21/31053

摘要： In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

公开(公告)号：US07713879B2

公开(公告)日：2010-05-11

申请号：US11321848

申请日：2005-12-28

申请人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/302

CPC分类号： H01L21/76819 ,  C09G1/02 ,  H01L21/31053

摘要： In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

摘要翻译： 在一个实施方案中，一种用于具有第一层和阶梯部分的基材的化学机械抛光方法。 第一层的表面位于台阶部的上表面的上方。 通过使用具有自停特性的第一浆料组合物在第一层上进行用于选择性去除台阶部分的抛光工艺，使得第一层变成具有基本平坦表面的第二层。 使用不具有自停特性的第二浆料组合物进行第二抛光处理，直到阶梯部分的上表面露出。

公开(公告)号：US20100147799A1

公开(公告)日：2010-06-17

申请号：US12711344

申请日：2010-02-24

申请人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Dong-Keun Kim ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： C23F1/00

CPC分类号： H01L21/76819 ,  C09G1/02 ,  H01L21/31053

摘要： In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.

摘要翻译： 在一个实施方案中，一种用于具有第一层和阶梯部分的基材的化学机械抛光方法。 第一层的表面位于台阶部的上表面的上方。 通过使用具有自停特性的第一浆料组合物在第一层上进行用于选择性去除台阶部分的抛光工艺，使得第一层变成具有基本平坦表面的第二层。 使用不具有自停特性的第二浆料组合物进行第二抛光处理，直到阶梯部分的上表面露出。

公开(公告)号：US07589013B2

公开(公告)日：2009-09-15

申请号：US11484676

申请日：2006-07-12

申请人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L21/4763

CPC分类号： H01L45/143 ,  H01L21/76834 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1675

摘要： Example embodiments of the present invention relate to an electrode structure, a method of manufacturing the electrode structure, a phase-change memory device having the electrode structure and a method of manufacturing the phase-change memory device. The electrode structure may include a pad, a first insulation layer pattern, a second insulation layer pattern and/or an electrode. The first insulation layer pattern may be formed on the pad. The first insulation layer pattern may have a first opening that partially exposes the pad. The second insulation layer pattern may be formed on the first insulation layer pattern. The second insulation layer pattern may have a second opening connected to the first opening. The electrode may be formed on the pad and filling the first and the second openings.

摘要翻译： 本发明的示例性实施例涉及电极结构，制造电极结构的方法，具有电极结构的相变存储器件和制造相变存储器件的方法。 电极结构可以包括焊盘，第一绝缘层图案，第二绝缘层图案和/或电极。 第一绝缘层图案可以形成在垫上。 第一绝缘层图案可以具有部分地暴露垫的第一开口。 第二绝缘层图案可以形成在第一绝缘层图案上。 第二绝缘层图案可以具有连接到第一开口的第二开口。 电极可以形成在垫上并填充第一和第二开口。

公开(公告)号：US20070063247A1

公开(公告)日：2007-03-22

申请号：US11450269

申请日：2006-06-12

申请人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L27/108

CPC分类号： H01L27/10894 ,  H01L27/10852

摘要： Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.

摘要翻译： 提供一种包括在基板表面上方延伸的垂直取向的电容器的半导体器件以及制造这样的器件的方法，其中在半导体衬底上限定了单元和外围区域之间的单元，外围和边界区域。 电容器形成在电池区域中，在外围区域设置模具图案，并且在边界区域中设置细长的虚拟图案。 虚拟图案包括边界开口，其中在形成下电极期间在细长的内侧壁上和在基板的暴露部分上形成薄层。 然后形成具有基本上相同高度的模具图案和下部电极结构，使得随后的绝缘中间层呈现大致平坦的表面，即在电池区域和外围区域之间没有显着的步进差异。

公开(公告)号：US20070057308A1

公开(公告)日：2007-03-15

申请号：US11484676

申请日：2006-07-12

申请人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L29/76

CPC分类号： H01L45/143 ,  H01L21/76834 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1675

摘要： Example embodiments of the present invention relate to an electrode structure, a method of manufacturing the electrode structure, a phase-change memory device having the electrode structure and a method of manufacturing the phase-change memory device. The electrode structure may include a pad, a first insulation layer pattern, a second insulation layer pattern and/or an electrode. The first insulation layer pattern may be formed on the pad. The first insulation layer pattern may have a first opening that partially exposes the pad. The second insulation layer pattern may be formed on the first insulation layer pattern. The second insulation layer pattern may have a second opening connected to the first opening. The electrode may be formed on the pad and filling the first and the second openings.

摘要翻译： 本发明的示例性实施例涉及电极结构，制造电极结构的方法，具有电极结构的相变存储器件和制造相变存储器件的方法。 电极结构可以包括焊盘，第一绝缘层图案，第二绝缘层图案和/或电极。 第一绝缘层图案可以形成在垫上。 第一绝缘层图案可以具有部分地暴露垫的第一开口。 第二绝缘层图案可以形成在第一绝缘层图案上。 第二绝缘层图案可以具有连接到第一开口的第二开口。 电极可以形成在垫上并填充第一和第二开口。

公开(公告)号：US07156722B2

公开(公告)日：2007-01-02

申请号：US11260902

申请日：2005-10-28

申请人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： B24B1/00

CPC分类号： B24B37/16

摘要： A platen structure of a polishing apparatus for semiconductor wafer and a method for exchanging a polishing pad affixed to the same are provided in which the polishing pad supported by the platen is exchanged with convenience within a short time. The platen structure of the polishing apparatus in which the polishing pad attached to the platen of the polishing apparatus comprises a pad plate to which the polishing pad for polishing a wafer is attached, and a platen body combined with the pad plate and having at least one vacuum hole formed thereto to provide a vacuum passage.

摘要翻译： 提供了一种用于半导体晶片的抛光装置的压板结构和用于更换固定在其上的抛光垫的方法，其中在短时间内方便地更换由压板支撑的抛光垫。 抛光装置的压板结构，其中安装在抛光装置的压板上的抛光垫包括一个垫板，用于抛光晶片的抛光垫被安装到该垫板上，以及压板体与该焊盘板组合并具有至少一个 形成真空孔以提供真空通道。

公开(公告)号：US07709319B2

公开(公告)日：2010-05-04

申请号：US11450269

申请日：2006-06-12

申请人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L27/108

CPC分类号： H01L27/10894 ,  H01L27/10852

摘要： Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.

摘要翻译： 提供一种包括在基板表面上方延伸的垂直取向的电容器的半导体器件以及制造这样的器件的方法，其中在半导体衬底上限定了单元和外围区域之间的单元，外围和边界区域。 电容器形成在电池区域中，在外围区域设置模具图案，并且在边界区域中设置细长的虚拟图案。 虚拟图案包括边界开口，其中在形成下电极期间在细长的内侧壁上和在基板的暴露部分上形成薄层。 然后形成具有基本上相同高度的模具图案和下部电极结构，使得随后的绝缘中间层呈现大致平坦的表面，即在电池区域和外围区域之间没有显着的步进差异。

公开(公告)号：US20080042240A1

公开(公告)日：2008-02-21

申请号：US11976251

申请日：2007-10-23

申请人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

发明人： Yeol Jon ,  Chung-Ki Min ,  Yong-Sun Ko ,  Kyung-Hyun Kim

IPC分类号： H01L29/00

CPC分类号： H01L27/10894 ,  H01L27/10852

摘要： Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.

摘要翻译： 提供一种包括在基板表面上方延伸的垂直取向的电容器的半导体器件以及制造这样的器件的方法，其中在半导体衬底上限定了单元和外围区域之间的单元，外围和边界区域。 电容器形成在电池区域中，在外围区域设置模具图案，并且在边界区域中设置细长的虚拟图案。 虚拟图案包括边界开口，其中在形成下电极期间在细长的内侧壁上和在基板的暴露部分上形成薄层。 然后形成具有基本上相同高度的模具图案和下部电极结构，使得随后的绝缘中间层呈现大致平坦的表面，即在电池区域和外围区域之间没有显着的步进差异。