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    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
    1.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 有权
    半导体结构及其制造方法

    公开(公告)号：US20070096257A1

    公开(公告)日：2007-05-03

    申请号：US11163882

    申请日：2005-11-02

    申请人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

    发明人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

    IPC分类号： H01L27/102

    CPC分类号： H01L27/0814 ,  H01L27/0664 ,  H01L27/0823 ,  H01L29/0821 ,  H01L29/7371 ,  H01L29/868

    摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

    摘要翻译： 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
    2.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 有权
    半导体结构及其制造方法

    公开(公告)号：US20080099787A1

    公开(公告)日：2008-05-01

    申请号：US11873696

    申请日：2007-10-17

    申请人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

    发明人： Douglas Coolbaugh ,  Alvin Joseph ,  Seong-dong Kim ,  Louis Lanzerotti ,  Xuefeng Liu ,  Robert Rassel

    IPC分类号： H01L27/06

    CPC分类号： H01L27/0814 ,  H01L27/0664 ,  H01L27/0823 ,  H01L29/0821 ,  H01L29/7371 ,  H01L29/868

    摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

    摘要翻译： 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

    BURIED SUBCOLLECTOR FOR HIGH FREQUENCY PASSIVE DEVICES
    3.
    发明申请
    BURIED SUBCOLLECTOR FOR HIGH FREQUENCY PASSIVE DEVICES 失效
    用于高频无源器件的BURIED SUBCOLLECTOR

    公开(公告)号：US20070105354A1

    公开(公告)日：2007-05-10

    申请号：US11164108

    申请日：2005-11-10

    申请人： Douglas Coolbaugh ,  Xuefeng Liu ,  Robert Rassel ,  David Sheridan

    发明人： Douglas Coolbaugh ,  Xuefeng Liu ,  Robert Rassel ,  David Sheridan

    IPC分类号： H01L21/425

    CPC分类号： H01L21/8249 ,  H01L29/0821 ,  H01L29/66272

    摘要： A method of fabricating a buried subcollector in which the buried subcollector is implanted to a depth in which during subsequent epi growth the buried subcollector remains substantially below the fictitious interface between the epi layer and the substrate is provided. In particular, the inventive method forms a buried subcollector having an upper surface (i.e., junction) that is located at a depth from about 3000 Å or greater from the upper surface of the semiconductor substrate. This deep buried subcollector having an upper surface that is located at a depth from about 3000 Å or greater from the upper surface of the substrate is formed using a reduced implant energy (as compared to a standard deep implanted subcollector process) at a relative high dose. The present invention also provides a semiconductor structure including the inventive buried subcollector which can be used as cathode for passive devices in high frequency applications.

    摘要翻译： 一种制造掩埋子集电极的方法，其中将埋入的子集电极注入深度，其中在随后的外延生长期间，掩埋子集电极基本上保持在外延层和衬底之间的虚拟界面的下方。 特别地，本发明的方法形成了具有从半导体衬底的上表面位于距离大约或更大的深度的上表面（即结）的掩埋子集电极。 该深埋底部集电器具有从衬底的上表面位于距离大约等于或更大的深度的上表面，其使用相对高剂量的减少的注入能量（与标准深度植入子集电极过程相比） 。 本发明还提供了一种半导体结构，其包括本发明的掩埋子集电极，其可以用作高频应用中的无源器件的阴极。

    Semiconductor structure and method of manufacture
    5.
    发明授权
    Semiconductor structure and method of manufacture 有权
    半导体结构及制造方法

    公开(公告)号：US08022496B2

    公开(公告)日：2011-09-20

    申请号：US11873696

    申请日：2007-10-17

    申请人： Douglas D. Coolbaugh ,  Alvin J. Joseph ,  Seong-dong Kim ,  Louis D. Lanzerotti ,  Xuefeng Liu ,  Robert M. Rassel

    发明人： Douglas D. Coolbaugh ,  Alvin J. Joseph ,  Seong-dong Kim ,  Louis D. Lanzerotti ,  Xuefeng Liu ,  Robert M. Rassel

    IPC分类号： H01L29/47

    CPC分类号： H01L27/0814 ,  H01L27/0664 ,  H01L27/0823 ,  H01L29/0821 ,  H01L29/7371 ,  H01L29/868

    摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

    摘要翻译： 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

    Semiconductor structure and method of manufacture
    7.
    发明授权
    Semiconductor structure and method of manufacture 有权
    半导体结构及制造方法

    公开(公告)号：US07329940B2

    公开(公告)日：2008-02-12

    申请号：US11163882

    申请日：2005-11-02

    申请人： Douglas D. Coolbaugh ,  Alvin J. Joseph ,  Seong-dong Kim ,  Louis D. Lanzerotti ,  Xuefeng Liu ,  Robert M. Rassel

    发明人： Douglas D. Coolbaugh ,  Alvin J. Joseph ,  Seong-dong Kim ,  Louis D. Lanzerotti ,  Xuefeng Liu ,  Robert M. Rassel

    IPC分类号： H01L27/082

    CPC分类号： H01L27/0814 ,  H01L27/0664 ,  H01L27/0823 ,  H01L29/0821 ,  H01L29/7371 ,  H01L29/868

    摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

    摘要翻译： 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
    8.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 失效
    半导体结构及其制造方法

    公开(公告)号：US20070241421A1

    公开(公告)日：2007-10-18

    申请号：US11279934

    申请日：2006-04-17

    申请人： Xuefeng Liu ,  Robert Rassel ,  Steven Voldman

    发明人： Xuefeng Liu ,  Robert Rassel ,  Steven Voldman

    IPC分类号： H01L21/331 ,  H01L29/00

    CPC分类号： H01L29/7322 ,  H01L27/0921 ,  H01L29/0821 ,  H01L29/66272

    摘要： A structure comprises a deep subcollector buried in a first region of a dual epitaxial layer and a reachthrough structure in contact with the deep subcollector to provide a low-resistive shunt which prevents CMOS latch-up for a first device. The structure may additionally include a near subcollector formed in a higher region than the deep subcollector and under another device. At least one reachthrough electrically connects the deep subcollector and the near subcollector. The method includes forming a merged triple well double epitaxy/double subcollector.

    摘要翻译： 一种结构包括埋藏在双外延层的第一区域中的深子集电极和与深子集电极接触的到达结构，以提供阻止第一器件的CMOS闩锁的低电阻分流。 该结构可以另外包括形成在比深层子集电极更高的区域内并且在另一器件下形成的近子集电极。 至少一个通孔电连接深子集电极和近子集电极。 该方法包括形成合并三阱双外延/双子集电极。

    SILICON DIOXIDE REMOVING METHOD
    9.
    发明申请
    SILICON DIOXIDE REMOVING METHOD 失效
    二氧化硅去除方法

    公开(公告)号：US20050070101A1

    公开(公告)日：2005-03-31

    申请号：US10605435

    申请日：2003-09-30

    申请人： Peter Geiss ,  Alvin Joseph ,  Xuefeng Liu ,  James Nakos ,  James Quinlivan

    发明人： Peter Geiss ,  Alvin Joseph ,  Xuefeng Liu ,  James Nakos ,  James Quinlivan

    IPC分类号： H01L21/302 ,  H01L21/311 ,  H01L21/331 ,  H01L21/461

    CPC分类号： H01L29/66242 ,  H01L21/31116

    摘要： A method for removing silicon dioxide residuals is disclosed. The method includes reacting a portion of a silicon dioxide layer (i.e., oxide) to form a reaction product layer, removing the reaction product layer and annealing in an environment to remove oxide residuals. The method finds application in a variety of semiconductor fabrication processes including, for example, fabrication of a vertical HBT or silicon-to-silicon interface without an oxide interface.

    摘要翻译： 公开了一种去除二氧化硅残留物的方法。 该方法包括使一部分二氧化硅层（即氧化物）反应以形成反应产物层，除去反应产物层并在环境中退火以除去氧化物残余物。 该方法应用于各种半导体制造工艺中，包括例如制造垂直HBT或无硅氧化物界面的硅 - 硅界面。

    SiGe HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) AND METHOD OF FABRICATION
    10.
    发明申请
    SiGe HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) AND METHOD OF FABRICATION 失效
    SiGe异质双极晶体管（HBT）和制造方法

    公开(公告)号：US20060060887A1

    公开(公告)日：2006-03-23

    申请号：US10711482

    申请日：2004-09-21

    申请人： Peter Geiss ,  Alvin Joseph ,  Rajendran Krishnasamy ,  Xuefeng Liu

    发明人： Peter Geiss ,  Alvin Joseph ,  Rajendran Krishnasamy ,  Xuefeng Liu

    IPC分类号： H01L31/109

    CPC分类号： H01L29/66242 ,  H01L29/7378

    摘要： A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base and emitter regions includes a first region doped with an impurity having a first concentration and a second region doped with the impurity having a second concentration. Noise performance and reliability of the heterojunction bipolar transistor is improved without degrading ac performance.

    摘要翻译： 在包括集电极区域的第一导电类型的半导体衬底中形成异质结双极晶体管。 在基板上形成基极区域，在基极区域上形成发射极区域。 集电极，基极和发射极区域中的至少一个包括掺杂有第一浓度的杂质的第一区域和掺杂有第二浓度的杂质的第二区域。 提高异质结双极晶体管的噪声性能和可靠性，而不会降低交流性能。