摘要:
An objective of the present invention is to provide a sliding member for sheet-shaped recording material detachment having superior resistance to abrasion and superior heat resistant rigidity, and either a seal ring for an automobile or a seal ring or a sliding member for an industrial gas compressor, having high mechanical strength while ensuring flexibility. The objective is achieved with a sliding member for sheet-shaped recording material detachment, and either a seal ring for an automobile or a seal ring or a sliding member for an industrial gas compressor, made from a resin composite comprising: as a first element, either an adhesive fluorocarbon resin (A) or a resin compound of the resin (A) and a fluorocarbon resin (B) which differs from the resin (A), which are in a volumetric ratio (AB) of 5/95 to 99/1; and as a second element, 0.5 to 99 volume % of a thermoplastic polyimide (C).
摘要:
An objective of the present invention is to provide a sliding member for sheet-shaped recording material detachment having superior resistance to abrasion and superior heat resistant rigidity, and either a seal ring for an automobile or a seal ring or a sliding member for an industrial gas compressor, having high mechanical strength while ensuring flexibility. The objective is achieved with a sliding member for sheet-shaped recording material detachment, and either a seal ring for an automobile or a seal ring or a sliding member for an industrial gas compressor, made from a resin composite comprising: as a first element, either an adhesive fluorocarbon resin (A) or a resin compound of the resin (A) and a fluorocarbon resin (B) which differs from the resin (A), which are in a volumetric ratio (AB) of 5/95 to 99/1; and as a second element, 0.5 to 99 volume % of a thermoplastic polyimide (C).
摘要:
A semiconductor device includes: a semiconductor substrate having first and second areas; an STI isolation region being made of an isolation trench formed in the semiconductor substrate and an insulating film burying the isolation trench and defining a plurality of active regions in the first and second areas; a first structure formed on an area from the active region in the first area to a nearby STI isolation region and having a first height; and a second structure formed on an area from the active region in the second area to a nearby STI isolation region and having a second height, wherein the surface of the said STI isolation region in the first area is lower than the surface of said STI isolation region in the second area.
摘要:
Embodiments of the present invention disclose a memory device having an array of flash memory cells with source contacts that facilitate straight word lines, and a method for producing the same. The array is comprised of a plurality of non-intersecting shallow trench isolation (STI) regions that isolate a plurality of memory cell columns. A source column is implanted with n-type dopants after the formation of a tunnel oxide layer and a first polysilicon layer. The implanted source column is coupled to a plurality of common source lines that are coupled to a plurality of source regions associated with memory cells in the array. A source contact is coupled to the implanted source column for providing electrical coupling with the plurality of source regions. The source contact is collinear with a row of drain contacts that are coupled to drain regions associated with a row of memory cells. The arrangement of source contacts collinear with the row of drain contacts allows for straight word line formation.
摘要:
There is provided a semiconductor device having a COB type DRAM, which comprises a first insulating film formed on a semiconductor substrate, first wiring trenches formed in a first insulating film in the first region, second wiring trenches formed in the first insulating film in the second region to have a substantially same depth as the first wiring trenches, first wirings buried in lower portions of the first wiring trenches, a second insulating film buried in upper portions of the first wiring trenches and formed of material different from the first insulating film, and second wirings formed of same conductive material as the first wirings in the second wiring trenches and formed thicker than the first wirings. Accordingly, the pattern precision of the bit lines and the wirings that have a different film thickness can be increased, and through holes that are formed between the bit lines in the self-alignment manner are formed shallow, and also resistances of the bit lines and the wirings are reduced.
摘要:
According to one exemplary embodiment, a method for fabricating a floating gate memory array comprises a step of removing a dielectric material from an isolation region situated in a substrate to expose a trench, where the trench is situated between a first source region and a second source region, where the trench defines sidewalls in the substrate. The method further comprises implanting an N type dopant in the first source region, the second source region, and the sidewalls of the trench, where the N type dopant forms an N+ type region. The method further comprises implanting a P type dopant in the first source region, the second source region, and the sidewalls of the trench, where the P type dopant forms a P type region, and where the P type region is situated underneath the N+ type region.
摘要:
An organic thin film EL panel includes a plurality of transparent electrodes, an organic film, and a plurality of metal electrodes. The transparent electrodes are formed into stripes on a transparent substrate. The organic film includes a light-emitting layer and is formed on the transparent substrate and the transparent electrodes. The plurality of metal electrodes are formed into stripes on the organic film in a direction perpendicular to the transparent electrodes. The metal electrodes are comprised of a plurality of electrode portions arranged at a predetermined interval, and a plurality of interconnections that connect adjacent ones of the electrode portions to each other. The electrode portions have pixel regions where the metal electrodes and the transparent electrodes overlie each other, and connection regions other than the pixel regions. The interconnections connect the connection regions of adjacent ones of the electrode portions to each other. A method of manufacturing an organic thin film EL panel is also disclosed.
摘要:
A nonvolatile semiconductor memory device including a memory cell array of memory cells arranged in a matrix, each of which includes a selecting transistor and a memory cell transistor; a column decoder controlling the potential of bit lines; a voltage application circuit controlling the potential of the first word lines; a first row decoder controlling the potential of the second word lines; and a second row decoder controlling the potential of the source line. The column decoder is formed of a circuit whose withstand voltage is lower than the voltage application circuit and the second row decoder.
摘要:
A semiconductor apparatus is presented that includes an array of memory cells. The memory cells are arranged in rows and columns. Non-intersecting shallow trench isolation regions isolate the columns of memory cells. Also included is at least one source region that is isolated between an adjoining pair of the non-intersecting shallow trench isolation regions and isolated from a drain region. The source region is coupled to source lines in the array of memory cells. A contact couples a select plurality of the columns of memory cells, the select plurality functioning as a single content addressable memory cell.
摘要:
A nonvolatile semiconductor memory device including a memory cell array of memory cells arranged in a matrix, each of which includes a selecting transistor and a memory cell transistor; a column decoder controlling the potential of bit lines; a voltage application circuit controlling the potential of the first word lines; a first row decoder controlling the potential of the second word lines; and a second row decoder controlling the potential of the source line. The column decoder is formed of a circuit whose withstand voltage is lower than the voltage application circuit and the second row decoder.