利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

18 条记录 (耗时 0.02 秒)

    NONVOLATILE MEMORY DEVICES AND METHODS OF OPERATING NONVOLATILE MEMORY DEVICES
    1.
    发明申请
    NONVOLATILE MEMORY DEVICES AND METHODS OF OPERATING NONVOLATILE MEMORY DEVICES 有权
    非易失性存储器件和操作非易失性存储器件的方法

    公开(公告)号：US20120257455A1

    公开(公告)日：2012-10-11

    申请号：US13211743

    申请日：2011-08-17

    申请人： Eun Chu Oh ,  Hong Rak Son ,  KyoungLae Cho ,  Junjin Kong

    发明人： Eun Chu Oh ,  Hong Rak Son ,  KyoungLae Cho ,  Junjin Kong

    IPC分类号： G11C16/10

    CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/3454

    摘要： Methods of operating nonvolatile memory devices including a plurality of cell strings each having at least one ground selection transistor, a plurality of memory cells, and at least one string selection transistor, the operating methods including receiving a command and an address, determining a voltage applying time in response to the input command and address, and applying a specific voltage to memory cells of cell strings corresponding to the input address during the determined voltage applying time.

    摘要翻译： 操作包括多个单元串的非易失性存储器件的方法，每个单元串具有至少一个接地选择晶体管，多个存储单元和至少一个串选择晶体管，所述操作方法包括接收命令和地址，确定施加的电压 响应于输入命令和地址的时间，以及在确定的电压施加时间期间，将特定电压施加到对应于输入地址的单元串的存储单元。

    Nonvolatile memory devices and methods of operating nonvolatile memory devices
    4.
    发明授权
    Nonvolatile memory devices and methods of operating nonvolatile memory devices 有权
    非易失性存储器件和操作非易失性存储器件的方法

    公开(公告)号：US08730738B2

    公开(公告)日：2014-05-20

    申请号：US13211743

    申请日：2011-08-17

    申请人： Eun Chu Oh ,  Hong Rak Son ,  KyoungLae Cho ,  Junjin Kong

    发明人： Eun Chu Oh ,  Hong Rak Son ,  KyoungLae Cho ,  Junjin Kong

    IPC分类号： G11C11/34 ,  G11C16/06

    CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/3454

    摘要： Methods of operating nonvolatile memory devices including a plurality of cell strings each having at least one ground selection transistor, a plurality of memory cells, and at least one string selection transistor, the operating methods including receiving a command and an address, determining a voltage applying time in response to the input command and address, and applying a specific voltage to memory cells of cell strings corresponding to the input address during the determined voltage applying time.

    摘要翻译： 操作包括多个单元串的非易失性存储器件的方法，每个单元串具有至少一个接地选择晶体管，多个存储单元和至少一个串选择晶体管，所述操作方法包括接收命令和地址，确定施加的电压 响应于输入命令和地址的时间，以及在确定的电压施加时间期间，将特定电压施加到对应于输入地址的单元串的存储单元。

    Method of operating a memory system having an erase control unit
    5.
    发明授权
    Method of operating a memory system having an erase control unit 有权
    一种具有擦除控制单元的存储系统的操作方法

    公开(公告)号：US09437310B2

    公开(公告)日：2016-09-06

    申请号：US14827930

    申请日：2015-08-17

    申请人： Eun Chu Oh ,  Hong Rak Son ,  Junjin Kong

    发明人： Eun Chu Oh ,  Hong Rak Son ,  Junjin Kong

    IPC分类号： G11C16/10 ,  G11C16/16 ,  G11C11/56 ,  G11C16/34 ,  G11C16/26

    CPC分类号： G11C16/16 ,  G11C11/5635 ,  G11C16/26 ,  G11C16/3468

    摘要： A method of operating a memory system including a nonvolatile memory including a memory block, and a memory controller including an erase control unit, includes performing pre-reading a plurality of memory cells connected to a selected word line of the memory block, generating an off cell count based on the pre-reading result, by operation of the erase control unit, comparing the off cell count with a reference value to generate a comparison result, and changing an erase operation condition based on the comparison result, by operation of the nonvolatile memory, and erasing the memory block according to the changed erase operation condition.

    摘要翻译： 一种操作包括包括存储器块的非易失性存储器的存储器系统的方法和包括擦除控制单元的存储器控​​制器，包括执行预读取连接到所述存储器块的选定字线的多个存储器单元，产生关断 基于预读取结果的单元计数，通过擦除控制单元的操作，将关闭单元计数与参考值进行比较以产生比较结果，以及通过非易失性存储器的操作来改变基于比较结果的擦除操作条件 存储器，并根据改变的擦除操作条件擦除存储器块。

    Non-volatile random access memory device and data read method thereof
    6.
    发明授权
    Non-volatile random access memory device and data read method thereof 有权
    非易失性随机存取存储器件及其数据读取方法

    公开(公告)号：US09093145B2

    公开(公告)日：2015-07-28

    申请号：US14141609

    申请日：2013-12-27

    申请人： Eun Chu Oh ,  JunJin Kong ,  Hong Rak Son ,  Younggeon Yoo

    发明人： Eun Chu Oh ,  JunJin Kong ,  Hong Rak Son ,  Younggeon Yoo

    IPC分类号： G11C7/00 ,  G11C13/00

    CPC分类号： G11C13/004 ,  G11C11/16 ,  G11C11/1673 ,  G11C13/0002 ,  G11C13/0004 ,  G11C2013/0054

    摘要： A nonvolatile random access memory device includes a plurality of memory cells configured to store data therein, a plurality of reference cells separate from the memory cells, the reference cells each configured to output a corresponding reference cell signal, and a read/write circuit. The read/write circuit is configured to generate from the reference cell signals a reference signal which is variable to have a plurality of different reference levels. The read/write circuit is further configured to identify, in response to the reference signal, a logic state among a first logic state and a second logic state for each of one or more selected memory cells, and to output read data corresponding to the identified logic state.

    摘要翻译： 非易失性随机存取存储器件包括多个存储器单元，其被配置为在其中存储数据，多个参考单元与存储器单元分离，每个参考单元被配置为输出相应的参考单元信号，以及读/写电路。 读/写电路被配置为从参考单元信号产生可变为具有多个不同参考电平的参考信号。 读/写电路还被配置为响应于参考信号识别一个或多个所选择的存储器单元中的每一个的第一逻辑状态和第二逻辑状态之间的逻辑状态，并且输出与所识别的对应的读取数据 逻辑状态。

    METHOD OF OPERATING A MEMORY SYSTEM HAVING AN ERASE CONTROL UNIT
    7.
    发明申请
    METHOD OF OPERATING A MEMORY SYSTEM HAVING AN ERASE CONTROL UNIT 有权
    操作具有擦除控制单元的存储器系统的方法

    公开(公告)号：US20160093387A1

    公开(公告)日：2016-03-31

    申请号：US14827930

    申请日：2015-08-17

    申请人： Eun Chu Oh ,  Hong Rak Son ,  Junjin Kong

    发明人： Eun Chu Oh ,  Hong Rak Son ,  Junjin Kong

    IPC分类号： G11C16/16 ,  G11C16/34 ,  G11C16/26

    CPC分类号： G11C16/16 ,  G11C11/5635 ,  G11C16/26 ,  G11C16/3468

    摘要： A method of operating a memory system including a nonvolatile memory including a memory block, and a memory controller including an erase control unit, includes performing pre-reading a plurality of memory cells connected to a selected word line of the memory block, generating an off cell count based on the pre-reading result, by operation of the erase control unit, comparing the off cell count with a reference value to generate a comparison result, and changing an erase operation condition based on the comparison result, by operation of the nonvolatile memory, and erasing the memory block according to the changed erase operation condition.

    摘要翻译： 一种操作包括包括存储器块的非易失性存储器的存储器系统的方法和包括擦除控制单元的存储器控​​制器，包括执行预读取连接到所述存储器块的选定字线的多个存储器单元，产生关断 基于预读取结果的单元计数，通过擦除控制单元的操作，将关闭单元计数与参考值进行比较以产生比较结果，以及通过非易失性存储器的操作来改变基于比较结果的擦除操作条件 存储器，并根据改变的擦除操作条件擦除存储器块。

    STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND GARBAGE COLLECTION METHOD THEREOF
    8.
    发明申请
    STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND GARBAGE COLLECTION METHOD THEREOF 审中-公开
    包含非易失性存储器件的存储器件及其收集方法

    公开(公告)号：US20160267004A1

    公开(公告)日：2016-09-15

    申请号：US15064185

    申请日：2016-03-08

    申请人： AMITAI PERLSTEIN ,  Eun Chu Oh ,  Amir Bennatan ,  Junjin Kong ,  Hong Rak Son

    发明人： AMITAI PERLSTEIN ,  Eun Chu Oh ,  Amir Bennatan ,  Junjin Kong ,  Hong Rak Son

    IPC分类号： G06F12/02

    CPC分类号： G06F12/0246 ,  G06F12/0253 ,  G06F2212/7205

    摘要： A storage device is provided as follows. A nonvolatile memory device includes blocks, each block having sub-blocks erased independently. A memory controller performs a garbage collection operation on the nonvolatile memory device by selecting a garbage collection victim sub-block among the sub-blocks and erasing the selected garbage collection victim sub-block to generate a free sub-block. The memory controller selects the garbage collection victim sub-block using valid page information of each sub-block and valid page information of memory cells adjacent to each sub-block.

    摘要翻译： 存储装置如下提供。 非易失性存储器件包括块，每个块具有独立擦除的子块。 存储器控制器通过选择子块中的垃圾收集受害者子块并擦除所选择的垃圾收集受害者子块以产生空闲子块来对非易失性存储器件执行垃圾回收操作。 存储器控制器使用每个子块的有效页面信息和与每个子块相邻的存储器单元的有效页面信息来选择垃圾回收受害者子块。

    MEMORY SYSTEM WITH INTERLEAVED ADDRESSING METHOD
    9.
    发明申请
    MEMORY SYSTEM WITH INTERLEAVED ADDRESSING METHOD 审中-公开
    具有异步寻址方法的记忆系统

    公开(公告)号：US20120246395A1

    公开(公告)日：2012-09-27

    申请号：US13426259

    申请日：2012-03-21

    申请人： Kyoung Lae Cho ,  Hong Rak Son ,  Eun Chu Oh

    发明人： Kyoung Lae Cho ,  Hong Rak Son ,  Eun Chu Oh

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246 ,  G06F11/073 ,  G06F11/076 ,  G06F11/0793 ,  G06F12/0638

    摘要： Disclosed is a memory system which includes a nonvolatile memory device including a memory cell array having a plurality of word lines including a first set of word lines storing first data having a high bit error rate, and a second set of word lines storing second data having low bit error rate less than the high bit error rate, and a memory controller that during a program operation maps logical addresses for a portion of the first data and a portion of the second data onto a selected word line selected from the plurality of word lines.

    摘要翻译： 公开了一种包括非易失性存储器件的存储器系统，该非易失性存储器件包括具有多个字线的存储单元阵列，该多个字线包括存储具有高误码率的第一数据的第一组字线和存储具有第二数据的第二数据的第二组， 低位错误率低于高位误码率;以及存储器控制器，其在编程操作期间将用于所述第一数据的一部分和所述第二数据的一部分的逻辑地址映射到从所述多个字线中选择的所选字线上 。

    Nonvolatile memory storage system
    10.
    发明授权
    Nonvolatile memory storage system 有权

    公开(公告)号：US10229749B2

    公开(公告)日：2019-03-12

    申请号：US15475670

    申请日：2017-03-31

    申请人： Eun Chu Oh ,  Pilsang Yoon ,  Jun Jin Kong ,  Hong Rak Son ,  Dongsup Jin

    发明人： Eun Chu Oh ,  Pilsang Yoon ,  Jun Jin Kong ,  Hong Rak Son ,  Dongsup Jin

    IPC分类号： G11C29/50 ,  G11C16/04 ,  G11C16/26 ,  G11C16/10

    摘要： A nonvolatile memory storage system includes a plurality of memory cells and a memory controller configured to transmit a read command to a nonvolatile memory device based on a plurality of read voltages. The nonvolatile memory device performs a first read operation on a first level among the N levels based on a first read voltage among the plurality of read voltages, counts the number of on-cells that respond to the first read voltage among the plurality of memory cells, and adjusts a level of a second read voltage to be used to perform a second read operation on the first level or a second level among the N levels among the plurality of read voltages according to a comparison result of the counted number of on-cells and the number of reference cells.