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    Mechanical packaging and thermal management of flat mirror arrays
    3.
    发明授权
    Mechanical packaging and thermal management of flat mirror arrays 失效
    平面镜阵列的机械包装和热管理

    公开(公告)号：US5721602A

    公开(公告)日：1998-02-24

    申请号：US540860

    申请日：1995-10-11

    申请人： Chandrasekhar Narayan ,  Evan Colgan ,  Kei-Hsiung Yang ,  Robert L. Melcher ,  Lawrence S. Mok ,  Leathen Shi ,  Thomas M. Cipolla

    发明人： Chandrasekhar Narayan ,  Evan Colgan ,  Kei-Hsiung Yang ,  Robert L. Melcher ,  Lawrence S. Mok ,  Leathen Shi ,  Thomas M. Cipolla

    IPC分类号： G02F1/13 ,  G02F1/133 ,  G02F1/1333 ,  G02F1/136 ,  G09F9/00 ,  H04N5/74

    CPC分类号： G02F1/133385 ,  G02F1/133308 ,  G02F1/136 ,  G02F2001/133322 ,  G02F2001/133325

    摘要： A liquid crystal element, a packaging structure providing thermal and alignment control, a display device including the same, and methods of fabrication and assembly are provided. The liquid crystal element includes: a semiconductor wafer, having microcircuitry and an array of reflective pixels; a layer of electro-optical responsive liquid crystal medium, of uniform thickness, disposed on the reflective pixels; a transparent conductive layer positioned on the liquid crystal, being substantially parallel to the reflective layers, to ensure a uniform thickness of the liquid crystal; and an insulative transparent layer provided on the conductive layer. The liquid crystal element is laminated to an optically flat substrate to limit the out-of-plane distortions thereof. The structure formed by element and substrate are disposed in a substrate holder which is mounted to a wiring board, and coupled to voltage sources for actuating the liquid crystal. During mounting, an aligning fixture is used to ensure proper orientation of the element relative to the related optical elements. Once the element is positioned, a heat sink is coupled to the rear surface of the substrate holder to dissipate heat.

    摘要翻译： 提供液晶元件，提供热和对准控制的封装结构，包括该液晶元件的显示装置，以及制造和组装方法。 液晶元件包括：具有微电路的半导体晶片和反射像素阵列; 设置在反射像素上的均匀厚度的电光响应液晶介质层; 位于液晶上的透明导电层基本上平行于反射层，以确保液晶的均匀厚度; 以及设置在导电层上的绝缘透明层。 将液晶元件层压到光学平面基板上以限制其平面外失真。 由元件和基板形成的结构设置在安装到布线板上的基板保持器中，并连接到用于致动液晶的电压源。 在安装期间，使用对准夹具来确保元件相对于相关光学元件的正确取向。 一旦元件被定位，散热器耦合到衬底保持器的后表面以散热。

    Mixed fuse technologies
    7.
    发明授权
    Mixed fuse technologies 失效
    混合保险丝技术

    公开(公告)号：US06288436B1

    公开(公告)日：2001-09-11

    申请号：US09361960

    申请日：1999-07-27

    申请人： Chandrasekhar Narayan ,  Kenneth Arndt ,  Toshiaki Kirihata ,  David Lachtrupp ,  Axel Brintzinger ,  Gabriel Daniel

    发明人： Chandrasekhar Narayan ,  Kenneth Arndt ,  Toshiaki Kirihata ,  David Lachtrupp ,  Axel Brintzinger ,  Gabriel Daniel

    IPC分类号： H01L2900

    CPC分类号： H01L22/22 ,  H01L23/5256 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A plurality of fuses of different types, each type of fuse serving a specific purpose are positioned on a semiconductor integrated circuit wafer, wherein activating one type of fuse does not incapacitate fuses of a different type. Fuses of the first type, e.g., laser activated fuses, are primarily used for repairing defects at the wafer level, whereas fuses of the second type, e.g., electrically activated fuses, are used for repairing defects found after mounting the IC chips on a module and stressing the module at burn-in test. Defects at the module level typically are single cell failures which are cured by the electrically programmed fuses to activate module level redundancies.

    摘要翻译： 多种不同类型的保险丝，每种类型的用于特定用途的保险丝都位于半导体集成电路晶片上，其中激活一种类型的保险丝不会使不同类型的保险丝失效。 第一种类型的保险丝，例如激光激活的保险丝，主要用于修复晶圆级的缺陷，而第二种类型的保险丝，例如电激活保险丝，用于修复将IC芯片安装在模块上所发现的缺陷 并在老化测试中强调模块。 模块级别的缺陷通常是单电池故障，它们由电气编程的保险丝固化，以激活模块级冗余。

    Defect management engine for semiconductor memories and memory systems
    8.
    发明授权
    Defect management engine for semiconductor memories and memory systems 有权
    半导体存储器和存储器系统的缺陷管理引擎

    公开(公告)号：US6141267A

    公开(公告)日：2000-10-31

    申请号：US243645

    申请日：1999-02-03

    申请人： Toshiaki Kirihata ,  Louis Lu-Chen Hsu ,  Chandrasekhar Narayan

    发明人： Toshiaki Kirihata ,  Louis Lu-Chen Hsu ,  Chandrasekhar Narayan

    IPC分类号： G11C5/02 ,  G11C8/06 ,  G11C11/00 ,  G11C29/00 ,  G11C7/00

    CPC分类号： G11C29/808 ,  G11C11/005 ,  G11C29/846 ,  G11C5/02 ,  G11C8/06

    摘要： A defect management engine (DME) for memories integrates a plurality of redundancy data cells and a plurality of redundancy address cells in the same array. The redundancy data cells are used for replacing defective cells in the memories. The redundancy address cells store the addresses of the defective cells. The memories are preferably sub-divided into a plurality of domains. A plurality of defective cells in each domain are supported by a plurality of repair units, each consisting of one or more redundancy data bits and redundancy address bits in the DME. When one or more data bits are read from a domain in the memory, the corresponding wordline in the DME simultaneously activates a plurality of repair units coupling to the wordline (self-contained domain selection). The redundancy data bits and the redundancy address bits are also read from the redundancy data cells and redundancy address cells, respectively. The DME logic detects whether or not the redundancy address bits match or do not match the address inputs of each repair unit (self contained redundancy match detection). This couples either redundancy data bits from the DME (i.e., a matching condition) or the data bits from the domain in the memories (i.e., a no match condition) to the corresponding DQ (self-contained redundancy replacement). The DME enables an integrated redundancy means (self-contained domain selection, self-contained redundancy match detection, and self-contained redundancy replacement). Single bit replacement, multi-bit replacement, line replacement, and variable bit size replacement are discussed. Finally, an extension of the DME concept to a memory system is also discussed.

    摘要翻译： 用于存储器的缺陷管理引擎（DME）将多个冗余数据单元和多个冗余地址单元集成在相同的阵列中。 冗余数据单元用于替换存储器中的有缺陷的单元。 冗余地址单元存储有缺陷单元的地址。 存储器优选地被细分为多个域。 每个域中的多个缺陷单元由多个修复单元支持，每个修复单元由DME中的一个或多个冗余数据位和冗余地址位组成。 当从存储器中的域读取一个或多个数据位时，DME中的相应字线同时激活耦合到字线（自包含域选择）的多个修复单元。 冗余数据位和冗余地址位也分别从冗余数据单元和冗余地址单元读取。 DME逻辑检测冗余地址位是否匹配或不匹配每个修复单元的地址输入（自包含冗余匹配检测）。 这将来自DME的冗余数据位（即，匹配条件）或来自存储器中的域的数据位（即，不匹配条件）耦合到相应的DQ（独立冗余替换）。 DME可实现集成的冗余手段（自包含域选择，独立冗余匹配检测和自包含冗余替换）。 讨论了单位替换，多位替换，线替换和可变位大小替换。 最后还讨论了将DME概念扩展到内存系统。

    Controlled temperature bonding
    9.
    发明授权
    Controlled temperature bonding 失效
    受控温度键合

    公开(公告)号：US5641114A

    公开(公告)日：1997-06-24

    申请号：US475255

    申请日：1995-06-07

    申请人： Raymond Robert Horton ,  Chandrasekhar Narayan ,  Michael Jon Palmer

    发明人： Raymond Robert Horton ,  Chandrasekhar Narayan ,  Michael Jon Palmer

    IPC分类号： B23K1/00 ,  B23K31/02 ,  B23K37/00

    CPC分类号： B23K1/0016 ,  B23K2201/40

    摘要： In a bonding station the parts of the apparatus to be bonded are retained at a thermal bias temperature at a permitted level and a thermal check valve interface is provided between the bonding location and the part of the station that would serve as a conduction heat sink, thereby thermally insulating other uninvolved parts of the structure and and confining the bonding heat to the bonding region. Such confinement reduces the dwell time that the bond must remain at the bonding temperature. The bonding station has a number of features: the parts to be bonded are maintained on a support member that is provided with a heat biasing capability that can establish the assembly at a specified temperature; a retention capability, such as the use of vacuum, is provided to maintain registration and thermal contact of the part with the support; and a thermal check valve capability is provided to control the rate of heat flow through the support member so that locallized heat is controlled in dissipation.

    摘要翻译： 在接合站中，要被接合的设备的部件被保持在允许的水平的热偏压温度，并且在用作传导散热器的接合位置和站的部分之间提供热止回阀接口， 从而将结构的其它未掺杂部分进行绝热并且将结合热限制到接合区域。 这种限制减少了粘合在粘合温度下必须保持的停留时间。 粘合台具有许多特征：待粘合的部件被保持在具有可在规定温度下建立组件的热偏置能力的支撑部件上; 提供保持能力，例如使用真空，以保持部件与支撑件的配准和热接触; 并且提供热止回阀能力以控制通过支撑构件的热流的速率，从而控制局部放热的散热。

    Flat panel display containing black matrix polymer
    10.
    发明授权
    Flat panel display containing black matrix polymer 失效
    含黑色矩阵聚合物的平板显示器

    公开(公告)号：US5619357A

    公开(公告)日：1997-04-08

    申请号：US466317

    申请日：1995-06-06

    申请人： Marie Angelopoulos ,  Ali Afzali-Ardakani ,  Claudius Feger ,  Chandrasekhar Narayan

    发明人： Marie Angelopoulos ,  Ali Afzali-Ardakani ,  Claudius Feger ,  Chandrasekhar Narayan

    IPC分类号： G02F1/1335

    CPC分类号： G02F1/133512

    摘要： A thin film transistor display that comprises a black matrix polymer layer, comprising a polymer having an optical density of at least about 0.8 per .mu.m and being self-absorbent of visible light and being selected from the group consisting of substituted and unsubstituted polyanilines, substituted and unsubstituted polyparaphenylenevinylenes, substituted and unsubstituted polythiophenes, substituted and unsubstituted polyazines, substituted and unsubstituted polyparaphenylenes, substituted and unsubstituted polyfuranes, substituted and unsubstituted polypyrroles, substituted and unsubstituted polyselenophene, substituted and unsubstituted poly-p-phenylene sulfides and substituted and unsubstituted polyacetylenes, and mixtures thereof, and copolymers thereof. The layer also comprises one or more pigments. The resistivity of the black matrix composite is 10E12 to 10E14 ohm cm.

    摘要翻译： 一种薄膜晶体管显示器，其包括黑矩阵聚合物层，其包含光密度为至少约0.8每μm的聚合物，并且是可吸收的可见光，并且选自取代和未取代的聚苯胺，取代的 取代和未取代的聚噻吩，取代和未取代的聚噻吩，取代和未取代的聚嗪，取代和未取代的聚对苯二烯，取代和未取代的聚呋喃，取代和未取代的聚吡咯，取代和未取代的聚硒吩，取代和未取代的聚对苯硫醚和取代和未取代的聚乙炔， 其混合物，及其共聚物。 该层还包含一种或多种颜料。 黑色矩阵复合材料的电阻率为10E12至10E14欧姆厘米。