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公开(公告)号：US20250022832A1
公开(公告)日：2025-01-16
申请号：US18902173
申请日：2024-09-30
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Tsubasa WATAKABE , Akihiko IWAYA , Yoko NAKAMURA , Yuta TAMAI , Mai SAITO
IPC: H01L23/00 , H01L23/02 , H01L23/31 , H01L23/34 , H01L23/498
Abstract: A semiconductor module, including: a circuit board including a semiconductor element having an electrode on an upper surface thereof; a lead bonded to the electrode by a bonding material; and a sealing material that seals the semiconductor element and the lead. The lead includes: a bonding portion bonded to the electrode, the bonding portion having a lower surface facing the electrode, and an upper surface opposite to the lower surface, and a plurality of recesses formed on the upper surface of the bonding portion. In a plan view of the semiconductor module, the bonding portion has a plurality of sides, and each recess has a bottom surface of a planar shape, the planar shape having a side extending in a direction that is not orthogonal to any of the sides of the bonding portion. Each of the recesses a barbed portion protruding from a wall surface thereof.
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公开(公告)号：US20240112991A1
公开(公告)日：2024-04-04
申请号：US18526144
申请日：2023-12-01
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Mai SAITO , Yoko NAKAMURA
IPC: H01L23/495 , H01L23/00 , H01L25/065
CPC classification number: H01L23/49531 , H01L23/49551 , H01L23/49575 , H01L24/08 , H01L24/40 , H01L25/0652 , H01L2224/08123 , H01L2224/08145 , H01L2224/40137 , H01L2224/40227 , H01L2924/0102 , H01L2924/1203 , H01L2924/13055
Abstract: A semiconductor module includes: a stacked substrate; a semiconductor element arranged on an upper surface of the first circuit board; a metal wiring board including a first bonding portion bonded to an upper surface of the semiconductor element with a bonding material; and a sealing resin that seals the stacked substrate, the semiconductor element, and the metal wiring board. The first bonding portion includes a plate-shaped portion having an upper surface and a lower surface. The metal wiring board has a first standing portion standing up from one end of the first bonding portion, and a second standing portion standing up from the other end of the first bonding portion. The first standing portion constitutes a part of a wiring path through which a main current flows. The second standing portion constitutes a non-wiring path through which the main current does not flow.
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公开(公告)号：US20240021569A1
公开(公告)日：2024-01-18
申请号：US18477635
申请日：2023-09-29
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Yoko NAKAMURA , Akihiko IWAYA , Mai SAITO , Tsubasa WATAKABE
IPC: H01L23/00 , H01L23/373 , H01L23/31
CPC classification number: H01L24/40 , H01L23/3735 , H01L23/3107 , H01L24/35 , H01L2224/40175 , H01L2224/4007 , H01L2224/352
Abstract: A semiconductor module includes a stacked substrate includes an insulating plate and first and second circuit boards arranged on the insulating plate, a semiconductor element arranged on the first circuit board, and a metal wiring board having a first bonding portion bonded to an upper surface of the semiconductor element via a first bonding material. The first bonding portion includes a first plate-shaped portion that has at a lower surface thereof, a boss protruding toward the semiconductor element, and at an upper surface thereof, a first recess at a position corresponding to a position immediately above the boss and multiple second recesses. At the upper surface of the first plate-shaped portion, each of the second recesses has an opening area smaller than an opening area of the first recess.
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公开(公告)号：US20150380374A1
公开(公告)日：2015-12-31
申请号：US14850274
申请日：2015-09-10
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Yoko NAKAMURA , Norihiro NASHIDA
IPC: H01L23/00 , H05K1/18 , H05K3/34 , H01L25/065
CPC classification number: H01L24/32 , H01L24/01 , H01L24/33 , H01L25/0655 , H01L25/07 , H01L25/18 , H01L2224/28105 , H01L2224/29111 , H01L2224/29139 , H01L2224/32113 , H01L2224/32225 , H01L2224/32258 , H01L2224/33181 , H01L2924/1203 , H01L2924/13055 , H01L2924/13091 , H01L2924/1431 , H01L2924/181 , H01L2924/351 , H05K1/181 , H05K3/341 , H01L2924/00012
Abstract: The semiconductor device includes an insulating substrate including an insulating plate and a circuit plate; a semiconductor chip having a front surface formed with an electrode and a rear surface fixed to the circuit plate; a printed circuit board including a metal layer, and facing the insulating substrate; a conductive bonding material disposed on the electrode; and a conductive post having a leading end portion electrically and mechanically connected to the electrode through the bonding material, a base portion electrically and mechanically connected to the metal layer, and a central portion. In the conductive post, a wetting angle of a surface of the leading end portion with respect to the molten bonding material is less than the wetting angle of a surface of the central portion.
Abstract translation: 半导体器件包括：绝缘基板，包括绝缘板和电路板; 半导体芯片，其具有形成有电极的正面和固定到所述电路板的后表面; 包括金属层的印刷电路板，并且面向绝缘基板; 设置在电极上的导电接合材料; 以及导电柱，其前端部通过所述接合材料与所述电极电连接机械连接，所述基部电连接和机械连接到所述金属层，以及中心部。 在导电柱中，前端部的表面相对于熔融接合材料的润湿角度小于中心部分的表面的润湿角度。
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公开(公告)号：US20210020604A1
公开(公告)日：2021-01-21
申请号：US16889223
申请日：2020-06-01
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Yoko NAKAMURA
IPC: H01L25/065 , H01L23/538 , H01L23/31 , H01L23/00
Abstract: A semiconductor device including: an insulating circuit substrate including a principal surface and a back surface; semiconductor chips each including an electrode on a principal surface and having a back surface on an opposite side to the principal surface, the back surface being fixed to the principal surface of the insulating circuit substrate; a wiring substrate facing the principal surface side of the insulating circuit substrate, separated from the semiconductor chip; a conductive post fixed to the electrode of the semiconductor chips and the wiring substrate; and a resin sealing body sealing the insulating circuit substrate, the semiconductor chips, the wiring substrate, and the conductive posts in such a manner as to expose the back surface of the insulating circuit substrate, wherein the semiconductor chips are respectively arranged on sides on which two short sides are located, and the conductive post has a recessed portion on its peripheral surface.
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公开(公告)号：US20180114735A1
公开(公告)日：2018-04-26
申请号：US15690278
申请日：2017-08-30
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Yoko NAKAMURA , Norihiro NASHIDA , Yuichiro HINATA
IPC: H01L23/31 , H01L23/498 , H01L23/053 , H01L23/10 , H01L25/00 , H01L21/56 , H01L25/07 , H01L21/48
Abstract: A semiconductor apparatus 1 includes a circuit substrate 3 having a circuit pattern layer 3c on an upper principal surface, semiconductor elements 4a and 4b mounted on the circuit pattern layer 3c of the circuit substrate 3, a printed substrate 6 arranged apart from the circuit substrate 3 on the upper principal surface side of the circuit substrate 3, a housing 2 mold-sealing the upper principal surface side of the circuit substrate 3, and a block 10 provided sandwiching at least part of the housing 2 and being opposite to the circuit substrate 3, the block having a linear expansion coefficient smaller than that of the housing 2.
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公开(公告)号：US20150380393A1
公开(公告)日：2015-12-31
申请号：US14850339
申请日：2015-09-10
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Yoko NAKAMURA , Norihiro NASHIDA
CPC classification number: H01L25/18 , H01L23/3107 , H01L23/3735 , H01L23/4006 , H01L23/49811 , H01L23/49833 , H01L23/49844 , H01L24/01 , H01L24/32 , H01L24/33 , H01L25/072 , H01L2224/06181 , H01L2224/32225 , H01L2224/32258 , H01L2924/10253 , H01L2924/10272 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/153 , H01L2924/15787 , H01L2924/30107 , H05K1/0263 , H05K1/144 , H05K1/181 , H05K3/284 , H05K2201/10022 , H05K2201/10166 , H05K2201/10242 , H01L2924/00
Abstract: A semiconductor device includes an insulating substrate including an insulating plate and a circuit plate disposed on a main surface of the insulating plate; a semiconductor chip having a front surface provided with an electrode and a rear surface fixed to the circuit plate; a printed circuit board facing the insulating substrate and including a metal layer; a conductive post having one end electrically and mechanically connected to the electrode and another end electrically and mechanically connected to the metal layer; a passive element fixed to the printed circuit board; and a plurality of positioning posts fixed to the printed circuit board to position the passive element.
Abstract translation: 半导体器件包括绝缘基板，绝缘基板包括绝缘板和布置在绝缘板的主表面上的电路板; 半导体芯片，具有设置有电极的前表面和固定到所述电路板的后表面; 面向绝缘基板并包括金属层的印刷电路板; 导电柱，其一端电连接和机械地连接到电极，另一端电连接和机械连接到金属层; 固定到印刷电路板的无源元件; 以及固定到印刷电路板以定位无源元件的多个定位柱。
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公开(公告)号：US20250062272A1
公开(公告)日：2025-02-20
申请号：US18934226
申请日：2024-10-31
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Tsubasa WATAKABE , Akihiko IWAYA , Yoko NAKAMURA , Yuta TAMAI , Mai SAITO
IPC: H01L23/00 , H01L23/495 , H01L25/07 , H05K1/14
Abstract: A semiconductor module, including: a stacked substrate, which includes an insulating plate, and a plurality of circuit boards formed on an upper surface of the insulating plate; a semiconductor element formed on an upper surface of one of the plurality of circuit boards; and a metal wiring board formed on an upper surface of the semiconductor element. The metal wiring board has a plate-shaped bonding portion bonded to the upper surface of the semiconductor element via a bonding material. The plate-shaped bonding portion has a plurality of recessed portions formed on an upper surface thereof, each recessed portion is of a hexagonal shape in a plan view of the semiconductor module.
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公开(公告)号：US20250054899A1
公开(公告)日：2025-02-13
申请号：US18933883
申请日：2024-10-31
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Yuta TAMAI , Akihiko IWAYA , Mai SAITO , Tsubasa WATAKABE , Yoko NAKAMURA
IPC: H01L23/00 , H01L23/495 , H01L23/498
Abstract: A semiconductor module, including: a stacked substrate including a plurality of circuit boards formed on an upper surface of an insulating plate; a semiconductor element formed on an upper surface of one of the plurality of circuit boards; and a metal wiring board formed on an upper surface of the semiconductor element. The metal wiring board has a bonding portion bonded to the upper surface of the semiconductor element via a bonding material. The bonding portion includes a plate-shaped portion having an upper surface and a lower surface. The plate-shaped portion has a roughened region in which a plurality of recessed portions are formed on the upper surface thereof. The plurality of recessed portions include a plurality of kinds, each kind differing in at least one of a size, a shape, and a depth of the recess portions therein from another kind.
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公开(公告)号：US20250022833A1
公开(公告)日：2025-01-16
申请号：US18902281
申请日：2024-09-30
Applicant: FUJI ELECTRIC CO., LTD.
Inventor： Yoko NAKAMURA , Akihiko IWAYA , Mai SAITO , Tsubasa WATAKABE , Yuta TAMAI
Abstract: A semiconductor module, including: a circuit board including a semiconductor element; a lead bonded to an electrode of the semiconductor element by a bonding material; and a sealing material sealing the semiconductor element and the lead. The lead includes: a bonding portion bonded to the electrode, and a roughening recess formed on an upper surface of the bonding portion. The roughening recess includes: a main recess having a first wall surfaces and a second wall surface opposite to each other, and a barbed portion formed on the first wall surface and protruding toward the second wall surface, and a sub-recess having: a center, which is located, in a plan view of the semiconductor module, outside the main recess and at a position away from the first wall surface by a predetermined distance, and an inclined surface that becomes shallower from the center toward an opening end of the main recess.
