Resist removing method, and curable pressure-sensitive adhesive,
adhesive sheets and apparatus used for the method
    1.
    发明授权
    Resist removing method, and curable pressure-sensitive adhesive, adhesive sheets and apparatus used for the method 失效
    抗蚀剂除去方法和可固化的压敏粘合剂,用于该方法的粘合片和设备

    公开(公告)号:US5466325A

    公开(公告)日:1995-11-14

    申请号:US288988

    申请日:1994-08-11

    摘要: A method for removing a resist pattern formed on a semiconductor wafer, and a curable pressure-sensitive adhesive, adhesive sheets and an apparatus used for the method. The resist-removing method comprising adhering an adhesive tape on an upper surface of a resist pattern formed on an article and peeling off the resist pattern together with the adhesive tape; the curable pressure-sensitive adhesive constituting the adhesive tape, comprising a pressure-sensitive adhesive polymer containing a non-volatile compound having at least one unsaturated double bond in the molecule and having a good affinity with a resist material to be removed; the adhesive sheet comprising a film substrate having formed thereon the curable pressure-sensitive adhesive; and the resist-removing apparatus comprising a means for press-adhering the adhesive tape, a tape-peeling means, and a substrate-washing means.

    摘要翻译: 一种用于去除形成在半导体晶片上的抗蚀剂图案的方法,以及用于该方法的可固化压敏粘合剂,粘合片和设备。 抗蚀剂去除方法包括将粘合带粘附在形成在制品上的抗蚀剂图案的上表面上并与粘合带一起剥离抗蚀剂图案; 构成粘合带的可固化压敏粘合剂包括在分子中含有至少一个不饱和双键的非挥发性化合物并且与要去除的抗蚀剂材料具有良好亲和性的压敏粘合剂聚合物; 所述粘合片包括其上形成有所述可固化压敏粘合剂的膜基材; 并且抗蚀剂去除装置包括用于压粘粘合带的装置,带剥离装置和基板清洗装置。

    Manufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used therefor
    4.
    再颁专利
    Manufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used therefor 有权
    半导体器件或半导体集成电路器件的制造方法或曝光方法及其使用的掩模

    公开(公告)号:USRE37996E1

    公开(公告)日:2003-02-18

    申请号:US09544634

    申请日:2000-04-06

    IPC分类号: G03C500

    摘要: One object of the present invention is to provide the reduced projection exposure method which enables the exposure of various and fine patterns in manufacturing process of semiconductor devices or semiconductor integrated circuit devices. Structure of the present invention to attain the above object is to carry out the reduced projection exposure using a phase shift mask provided with a prescribed correction pattern on the end of the mask pattern domain of a constant mode or the boundary of the mask pattern domain of plural modes. According to this structure, as the end effects etc. are canceled by the correction pattern, the various and fine patterns can be exposed.

    摘要翻译: 本发明的一个目的是提供一种能够在半导体器件或半导体集成电路器件的制造工艺中曝光各种精细图案的缩小投影曝光方法。 为了实现上述目的,本发明的结构是使用具有规定的校正图案的相移掩模在恒定模式的掩模图案域的末端或掩模图案域的边界上进行缩小的投影曝光 多种模式。 根据该结构,由于通过校正图案来消除结束效果等,因此可以暴露各种和精细图案。

    Alignment method and apparatus
    7.
    发明授权
    Alignment method and apparatus 失效
    对准方法和装置

    公开(公告)号:US5405810A

    公开(公告)日:1995-04-11

    申请号:US869174

    申请日:1992-04-16

    摘要: The present invention enables the accuracy of aligning a wafer and a reticle with each other in the exposure step in the manufacture of a semiconductor integrated circuit device to be improved. The portions of a metal film 5 and a resist film 6 which cover an alignment mark 4 on a wafer 1 are removed by a gas assisted etching treatment using a laser beam prior to the execution of an exposure treatment, so as to bare the alignment mark 4. The position detecting light is then applied from an alignment mark position detecting means in a reduction projection exposure unit 11 to the alignment mark 4, the position of the alignment mark 4 being detected on the basis of the light reflected on and scattered from the alignment mark 4.

    摘要翻译: 本发明使半导体集成电路器件的制造中的曝光步骤中的晶片和掩模版之间的对准精度得以提高。 在执行曝光处理之前,通过使用激光束的气体辅助蚀刻处理去除覆盖晶片1上的对准标记4的金属膜5和抗蚀剂膜6的部分,以便露出对准标记 然后,将位置检测光从缩小投影曝光单元11中的对准标记位置检测装置施加到对准标记4,基于从其反射和散射的光检测对准标记4的位置 对准标记4。

    Pattern defect inspecting apparatus
    10.
    发明授权
    Pattern defect inspecting apparatus 失效
    图案缺陷检查装置

    公开(公告)号:US06067153A

    公开(公告)日:2000-05-23

    申请号:US855824

    申请日:1997-05-12

    申请人: Fumio Mizuno

    发明人: Fumio Mizuno

    摘要: A high-speed pattern defect inspecting apparatus with a high sensitivity and less erroneous detection. In the pattern defect inspecting apparatus, a wafer is scanned by an electron beam, secondary electron signal generated by the scanning is stored in an image memory, and the stored image is used to cause a display unit to be subjected to a brightness modulation. A reference pattern image previously stored in the image memory is compared with a detected wafer pattern image to find a difference between the both images, and the difference is detected as a defect in a wafer pattern. The wafer scanning of the electron beam is carried out only for an arbitrary specified part thereon.

    摘要翻译: 具有灵敏度高,检错错误的高速图案缺陷检查装置。 在图案缺陷检查装置中,通过电子束扫描晶片,通过扫描产生的二次电子信号被存储在图像存储器中,并且存储的图像用于使显示单元进行亮度调制。 将预先存储在图像存储器中的参考图案图像与检测到的晶片图案图像进行比较以找到两个图像之间的差异,并且将该差异作为晶片图案中的缺陷检测。 电子束的晶片扫描仅对其上的任意指定部分进行。