公开(公告)号：US09679809B1

公开(公告)日：2017-06-13

申请号：US15077564

申请日：2016-03-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jongwook Kye ,  Yan Wang ,  Chenchen Wang ,  Wenhui Wang ,  Lei Yuan ,  Jia Zeng ,  Guillaume Bouche

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/28 ,  H01L45/00

CPC classification number: H01L21/28141 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76816 ,  H01L45/1691

Abstract: A method of forming a pattern for interconnect lines in an integrated circuit includes providing a structure having a first lithographic stack, a mandrel layer and a pattern layer disposed over a dielectric stack. Patterning the structure to form mandrels in the mandrel layer and disposing a spacer layer over the mandrels. Etching the spacer layer to form spacers disposed on sidewalls of the mandrels. The spacers and mandrels defining beta and gamma regions. A beta region includes a beta block mask portion and a gamma region includes a gamma block mask portion of the pattern layer. The method also includes etching a beta pillar over the beta block mask portion and etching a gamma pillar over the gamma block mask portion. The method also includes etching the structure to form a pattern in the pattern layer, the pattern including the gamma and beta block mask portions.

公开(公告)号：US09472464B1

公开(公告)日：2016-10-18

申请号：US15060691

申请日：2016-03-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jia Zeng ,  Lei Yuan ,  Youngtag Woo ,  Yan Wang ,  Jongwook Kye

IPC: H01L21/8238 ,  H01L29/66 ,  H01L21/308

CPC classification number: H01L21/823821 ,  H01L21/3086 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/785

Abstract: Methods for processes to form and use merged spacers in fin generation and the resulting devices are disclosed. Embodiments include providing first and second mandrels separated from each other across adjacent cells on a Si layer; forming first and second dummy-spacers and third and fourth dummy-spacers on opposite sides of the first and second mandrels, respectively; removing, through a block-mask, the first and fourth dummy spacers and a portion of the second and third dummy-spacers; forming first spacers on each exposed side of the mandrels and in between the second and third dummy-spacers, forming a merged spacer; removing the mandrels; removing a section of the merged-spacer; forming second spacers on all exposed sides of the first spacers and the merged-spacer; removing the merged-spacer and the first spacers; removing exposed sections of the Si layer through the second spacers; and removing the second spacers to reveal Si fins.

Abstract translation: 公开了在翅片生成中形成和使用合并间隔物的方法以及所得装置。 实施例包括提供在Si层上相邻的单元彼此分开的第一和第二心轴; 在第一和第二心轴的相对侧分别形成第一和第二虚拟间隔物和第三和第四虚拟间隔物; 通过块掩模去除第一和第四虚拟间隔物和第二和第三虚拟间隔物的一部分; 在心轴的每个暴露侧上并在第二和第三虚拟间隔件之间形成第一间隔件，形成合并间隔件; 去除心轴; 去除合并间隔物的一部分; 在第一间隔件和合并间隔件的所有暴露侧上形成第二间隔件; 去除合并间隔物和第一间隔物; 通过所述第二间隔物去除所述Si层的暴露部分; 并且移除第二间隔件以露出Si散热片。

公开(公告)号：US10147714B2

公开(公告)日：2018-12-04

申请号：US15289401

申请日：2016-10-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Yan Wang ,  Jia Zeng ,  Chenchen Wang ,  Wenhui Wang ,  Lei Yuan ,  Jongwook Kye

IPC: H01L27/02 ,  H01L21/768 ,  G06F17/50

Abstract: At least one method, apparatus and system disclosed involves providing a functional cell for a circuit layout for an integrated circuit device. A determination as to a first location for a two-dimensional portion of a first power rail in a functional cell is made. A first portion of the first power rail is formed in a first direction. A second portion of the first power rail is formed in a second direction in the first location for the two-dimensional portion.

公开(公告)号：US20160335389A1

公开(公告)日：2016-11-17

申请号：US14712830

申请日：2015-05-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Lei Yuan ,  Yan Wang ,  Chenchen Wang ,  Jongwook Kye

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5072 ,  G06F17/5077

Abstract: At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received. The design comprises a functional cell. A first substitute functional cell for a first value of shift of a set of routing tracks respective to the boundary of the functional cell is provided. The first substitute functional cell comprises at least one pin moved by an amount of the first value. A determination is made as to whether an amount of shift of the set of routing tracks corresponds to the first value. The functional cell is replaced with the first substitute functional cell in response to a determination that the amount of shift of the set of routing tracks corresponds to the first value.

Abstract translation: 所公开的至少一种方法，装置和系统涉及用于集成电路装置的电路布局。 接收集成电路装置的设计。 该设计包括功能单元。 提供了与功能单元的边界相对应的一组路线轨迹的第一移位值的第一替代功能单元。 第一替代功能单元包括移动了第一值的量的至少一个销。 确定路由路径组的移位量是否对应于第一值。 响应于确定路由路径集合的偏移量对应于第一值，功能单元被第一替代功能单元替换。

公开(公告)号：US09159724B2

公开(公告)日：2015-10-13

申请号：US14161063

申请日：2014-01-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Yan Wang ,  Yuansheng Ma ,  Jongwook Kye ,  Mahbub Rashed

IPC: H01L29/40 ,  H01L27/088 ,  H01L21/8234 ,  H01L27/02 ,  H01L21/768 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L27/088 ,  H01L21/76895 ,  H01L21/823475 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/092

Abstract: An approach for providing cross-coupling-based designs using diffusion contact structures is disclosed. Embodiments include providing first and second gate structures over a substrate; providing a gate cut region across the first gate structure, the second gate structure, or a combination thereof; providing a first gate contact over the first gate structure; providing a second gate contact over the second gate structure; and providing a diffusion contact structure coupling the first gate contact to the second gate contact, the diffusion contact structure having vertices within the gate cut region.

Abstract translation: 公开了一种使用扩散接触结构提供基于交叉耦合的设计的方法。 实施例包括在衬底上提供第一和第二栅极结构; 提供横跨所述第一栅极结构，所述第二栅极结构或其组合的栅极截止区域; 在第一栅极结构上提供第一栅极接触; 在所述第二栅极结构上提供第二栅极接触; 以及提供将所述第一栅极接触耦合到所述第二栅极接触的扩散接触结构，所述扩散接触结构在所述栅极切割区域内具有顶点。

公开(公告)号：US20180102354A1

公开(公告)日：2018-04-12

申请号：US15289401

申请日：2016-10-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Yan Wang ,  Jia Zeng ,  Chenchen Wang ,  Wenhui Wang ,  Lei Yuan ,  Jongwook Kye

IPC: H01L27/02 ,  H01L21/768 ,  G06F17/50

CPC classification number: H01L27/0207 ,  G06F17/5077 ,  H01L21/76838

Abstract: At least one method, apparatus and system disclosed involves providing a functional cell for a circuit layout for an integrated circuit device. A determination as to a first location for a two-dimensional portion of a first power rail in a functional cell is made. A first portion of the first power rail is formed in a first direction. A second portion of the first power rail is formed in a second direction in the first location for the two-dimensional portion.

公开(公告)号：US09727685B2

公开(公告)日：2017-08-08

申请号：US14712830

申请日：2015-05-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Lei Yuan ,  Yan Wang ,  Chenchen Wang ,  Jongwook Kye

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5072 ,  G06F17/5077

Abstract: At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received. The design comprises a functional cell. A first substitute functional cell for a first value of shift of a set of routing tracks respective to the boundary of the functional cell is provided. The first substitute functional cell comprises at least one pin moved by an amount of the first value. A determination is made as to whether an amount of shift of the set of routing tracks corresponds to the first value. The functional cell is replaced with the first substitute functional cell in response to a determination that the amount of shift of the set of routing tracks corresponds to the first value.