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    MAGNETIC SWITCHES FOR SPINWAVE TRANSMISSION
    1.
    发明申请
    MAGNETIC SWITCHES FOR SPINWAVE TRANSMISSION 审中-公开
    用于旋转传动的磁力开关

    公开(公告)号：US20090289736A1

    公开(公告)日：2009-11-26

    申请号：US12125974

    申请日：2008-05-23

    申请人： Haiwen Xi ,  Dadi Setiadi ,  Insik Jin ,  Yang Li ,  Song Xue

    发明人： Haiwen Xi ,  Dadi Setiadi ,  Insik Jin ,  Yang Li ,  Song Xue

    IPC分类号： H01P1/10 ,  H01H53/00

    CPC分类号： H01H59/0009 ,  H01H57/00

    摘要： Spinwave transmission systems that include switching devices to direct the transmission of the spinwaves used for data transfer and processing. In one particular embodiment, a system for spinwave transmission has a first magnetic stripe configured for transmission of a spinwave and a second magnetic stripe for transmission of the spinwave, with a gap therebetween. The system includes a coupler that has a first orientation and a second orientation, where in the first orientation, no magnetic connection is made between the magnetic stripes, and in the second orientation, a connection is made between the magnetic stripes. The connection allows transmission of the spinwave from the first magnetic stripe to the second magnetic stripe. The first and second orientation may be the physical position of the coupler, moved by thermal, piezoelectric, or electrostatic forces, or, the first and second orientation may be a magnetic state of the coupler.

    摘要翻译： 旋转波传输系统包括用于引导用于数据传输和处理的旋转波的传输的开关装置。 在一个具体实施例中，用于旋转波传输的系统具有被配置为用于传输旋转波的第一磁条和用于传播旋转波的第二磁条，其间具有间隙。 该系统包括具有第一取向和第二取向的耦合器，其中在第一取向中，在磁条之间不形成磁连接，并且在第二取向中，在磁条之间形成连接。 该连接允许将旋转波从第一磁条传输到第二磁条。 第一和第二取向可以是耦合器的物理位置，通过热，压电或静电力移动，或者第一和第二取向可以是耦合器的磁状态。

    Non-Volatile Memory Cell with Ferroelectric Layer Configurations
    3.
    发明申请
    Non-Volatile Memory Cell with Ferroelectric Layer Configurations 审中-公开
    具有铁电层配置的非易失性存储单元

    公开(公告)号：US20100135061A1

    公开(公告)日：2010-06-03

    申请号：US12326714

    申请日：2008-12-02

    申请人： Shaoping Li ,  Kaizhong Gao ,  Insik Jin ,  Song Xue ,  Haiwen Xi ,  Zheng Gao ,  Eileen Yan

    发明人： Shaoping Li ,  Kaizhong Gao ,  Insik Jin ,  Song Xue ,  Haiwen Xi ,  Zheng Gao ,  Eileen Yan

    IPC分类号： G11C11/22 ,  H01L29/68

    CPC分类号： G11C11/22 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/147

    摘要： In some embodiments of the invention a non-volatile memory cell is provided with a first electrode, a second electrode, and one or more side layers of a ferroelectric metal oxide and a ferroelectric material layer between the first and second electrodes. The ferroelectric material layer may be provided between, e.g., adjacent, two side layers of a ferroelectric metal oxide or between a single layer of a ferroelectric metal oxide and an electrode. The ferroelectric metal oxide may in some cases include a uniform layered structure such as a bismuth layer-structured ferroelectric material like Bi4Ti3O12. In some embodiments, the ferroelectric material layer is formed at least partially from PbZrxTi1-xO3. A non-volatile memory array including such memory cells is also provided.

    摘要翻译： 在本发明的一些实施例中，非易失性存储单元在第一和第二电极之间设置有第一电极，第二电极以及铁电金属氧化物和铁电材料层的一个或多个侧层。 铁电材料层可以设置在例如铁电金属氧化物的相邻的两个侧层之间或者设置在单层铁电金属氧化物和电极之间。 在一些情况下，铁电金属氧化物可以包括均匀的层状结构，例如诸如Bi 4 Ti 3 O 12的铋层结构的铁电材料。 在一些实施例中，铁电材料层至少部分地由PbZrxTi1-xO3形成。 还提供了包括这种存储单元的非易失性存储器阵列。

    NON-VOLATILE PROGRAMMABLE LOGIC GATES AND ADDERS
    6.
    发明申请
    NON-VOLATILE PROGRAMMABLE LOGIC GATES AND ADDERS 有权
    非易失性可编程逻辑门和插件

    公开(公告)号：US20110068825A1

    公开(公告)日：2011-03-24

    申请号：US12953544

    申请日：2010-11-24

    申请人： Haiwen Xi ,  Yang Li ,  Song Xue

    发明人： Haiwen Xi ,  Yang Li ,  Song Xue

    IPC分类号： H03K19/168 ,  H01L29/82

    CPC分类号： H03K19/173 ,  G11C11/161 ,  G11C11/1673

    摘要： Spin torque magnetic logic device having at least one input element and an output element. Current is applied through the input element(s), and the resulting resistance or voltage across the output element is measured. The input element(s) include a free layer and the output element includes a free layer that is electrically connected to the free layer of the input element. The free layers of the input element and the output element may be electrically connected via magnetostatic coupling, or may be physically coupled. In some embodiments, the output element may have more than one free layer.

    摘要翻译： 具有至少一个输入元件和输出元件的自旋扭矩磁逻辑器件。 通过输入元件施加电流，并测量输出元件两端产生的电阻或电压。 输入元件包括自由层，并且输出元件包括电连接到输入元件的自由层的自由层。 输入元件和输出元件的自由层可以通过静磁耦合电连接，或者可以物理耦合。 在一些实施例中，输出元件可以具有多于一个的自由层。

    BIT-PATTERNED MEDIA WITH ANTIFERROMAGNETIC SHELL
    7.
    发明申请
    BIT-PATTERNED MEDIA WITH ANTIFERROMAGNETIC SHELL 有权
    具有抗病毒壳体的双向图形介质

    公开(公告)号：US20100227202A1

    公开(公告)日：2010-09-09

    申请号：US12397457

    申请日：2009-03-04

    申请人： Kaizhong Gao ,  Haiwen Xi ,  Song Xue

    发明人： Kaizhong Gao ,  Haiwen Xi ,  Song Xue

    IPC分类号： G11B5/706 ,  G11B5/33 ,  B05D5/12 ,  B44C1/22

    CPC分类号： G11B5/855 ,  B82Y10/00 ,  G11B5/743 ,  G11B5/746 ,  G11B5/82 ,  H01F10/002 ,  H01L21/02112 ,  H01L29/82 ,  Y10T428/115

    摘要： A method of producing bit-patterned media is provided whereby a shell structure is added on a bit-patterned media dot. The shell may be an antiferromagnetic material that will help stabilize the magnetization configuration at the remanent state due to exchange coupling between the dot and its shell. Therefore, this approach also improves the thermal stability of the media dot and helps each individual media dot maintain a single domain state.

    摘要翻译： 提供了一种生产钻头图案化介质的方法，其中壳结构被添加在钻头图案化介质点上。 壳体可以是反铁磁材料，其将由于点和其壳体之间的交换耦合而有助于在剩余状态下稳定磁化结构。 因此，这种方法还可以提高介质点的热稳定性，并帮助各个介质点维持单一的畴状态。

    Nand Based Resistive Sense Memory Cell Architecture
    8.
    发明申请
    Nand Based Resistive Sense Memory Cell Architecture 有权
    基于Nand的电阻感知存储器单元架构

    公开(公告)号：US20100118579A1

    公开(公告)日：2010-05-13

    申请号：US12269656

    申请日：2008-11-12

    申请人： Harry Hongyue Liu ,  Haiwen Xi ,  Antoine Khoueir ,  Song Xue

    发明人： Harry Hongyue Liu ,  Haiwen Xi ,  Antoine Khoueir ,  Song Xue

    IPC分类号： G11C5/02 ,  G11C11/00 ,  G11C8/00 ,  G11C11/34

    CPC分类号： H01L27/24 ,  G11C11/1659 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/75 ,  H01L27/228

    摘要： Various embodiments are directed to an apparatus comprising a semiconductor memory array with non-volatile memory unit cells arranged into a NAND block. Each of the unit cells comprises a resistive sense element connected in parallel with a switching element. The resistive sense elements are connected in series to form a first serial path, and the switching elements are connected in series to form a second serial path parallel to the first serial path. Each resistive sense element is serially connected to an adjacent resistive sense element in the block by a tortuous conductive path having a portion that extends substantially vertically between said elements to provide operational isolation therefor.

    摘要翻译： 各种实施例涉及一种包括具有布置在NAND块中的非易失性存储器单元的半导体存储器阵列的装置。 每个单元电池包括与开关元件并联连接的电阻感测元件。 电阻感测元件串联连接以形成第一串行路径，并且开关元件串联连接以形成平行于第一串行路径的第二串行路径。 每个电阻感测元件通过具有在所述元件之间基本上垂直延伸的部分的曲折导电路径串联连接到块中的相邻电阻感测元件，以提供对其的操作隔离。

    NAND based resistive sense memory cell architecture
    9.
    发明授权
    NAND based resistive sense memory cell architecture 有权
    基于NAND的电阻式读写单元架构

    公开(公告)号：US08363442B2

    公开(公告)日：2013-01-29

    申请号：US12903716

    申请日：2010-10-13

    申请人： Harry Hongyue Liu ,  Haiwen Xi ,  Antoine Khoueir ,  Song Xue

    发明人： Harry Hongyue Liu ,  Haiwen Xi ,  Antoine Khoueir ,  Song Xue

    IPC分类号： G11C5/02

    CPC分类号： H01L27/24 ,  G11C11/1659 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/75 ,  H01L27/228

    摘要： Various embodiments are directed to an apparatus comprising a semiconductor memory array with non-volatile memory unit cells arranged into a NAND block. Each of the unit cells comprises a resistive sense element connected in parallel with a switching element. The resistive sense elements are connected in series to form a first serial path, and the switching elements are connected in series to form a second serial path parallel to the first serial path. Each resistive sense element is serially connected to an adjacent resistive sense element in the block by a tortuous conductive path having a portion that extends substantially vertically between said elements to provide operational isolation therefor.

    摘要翻译： 各种实施例涉及一种包括具有布置在NAND块中的非易失性存储器单元的半导体存储器阵列的装置。 每个单元电池包括与开关元件并联连接的电阻感测元件。 电阻感测元件串联连接以形成第一串行路径，并且开关元件串联连接以形成平行于第一串行路径的第二串行路径。 每个电阻感测元件通过具有在所述元件之间基本上垂直延伸的部分的曲折导电路径串联连接到块中的相邻电阻感测元件，以提供对其的操作隔离。