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    Method of manufacturing semiconductor device
    3.
    发明授权
    Method of manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US07947585B2

    公开(公告)日：2011-05-24

    申请号：US12090891

    申请日：2006-12-04

    申请人： In Bok Baek ,  Seong Jae Lee ,  Jong Heon Yang ,  Chang Geun Ahn ,  Han Young Yu ,  Ki Ju Im

    发明人： In Bok Baek ,  Seong Jae Lee ,  Jong Heon Yang ,  Chang Geun Ahn ,  Han Young Yu ,  Ki Ju Im

    IPC分类号： H01L21/22

    CPC分类号： H01L29/66439 ,  B82Y10/00 ,  H01L21/0273 ,  H01L21/28123 ,  H01L29/66484 ,  H01L29/66545 ,  H01L29/66575 ,  H01L29/66772 ,  H01L29/7613 ,  H01L29/7831

    摘要： Provided is a method of manufacturing a semiconductor device in which properties of photoresist through a lithography process are changed to form a dummy structure, and the structure is applied to a process of forming a gate electrode. The method includes the steps of: forming a buffer layer on the top of a semiconductor substrate; applying an inorganic photoresist on the buffer layer, and forming a photoresist pattern using a lithography process; thermally treating the photoresist pattern using a predetermined gas; uniformly depositing an insulating layer on the thermally treated structure, and etching the deposited layer by the deposited thickness in order to expose the thermally treated photoresist pattern; depositing an insulating layer on the etched structure, and etching the deposited insulating layer to expose the thermally treated photoresist pattern; removing the exposed photoresist pattern using an etching process; forming a gate oxide layer in the portion in which the photoresist pattern is removed; and forming a gate electrode on the gate oxide layer. Accordingly, in forming a structure for manufacturing a nano-sized device, the properties of the layer formed by a lithography process are improved through thermal treatment, and thus the structure used to manufacture various devices can be easily formed.

    摘要翻译： 提供了通过光刻处理改变光致抗蚀剂的特性以形成虚拟结构的半导体器件的制造方法，并且将该结构应用于形成栅电极的工艺。 该方法包括以下步骤：在半导体衬底的顶部上形成缓冲层; 在缓冲层上施加无机光致抗蚀剂，并使用光刻工艺形成光致抗蚀剂图案; 使用预定气体热处理光刻胶图案; 在热处理结构上均匀沉积绝缘层，并通过沉积的厚度蚀刻沉积层，以暴露热处理的光致抗蚀剂图案; 在蚀刻的结构上沉积绝缘层，并蚀刻沉积的绝缘层以暴露热处理的光致抗蚀剂图案; 使用蚀刻工艺去除曝光的光致抗蚀剂图案; 在除去光致抗蚀剂图案的部分中形成栅氧化层; 以及在所述栅极氧化物层上形成栅电极。 因此，在形成纳米尺寸器件的制造结构时，通过热处理提高了通过光刻工艺形成的层的性质，因此可以容易地形成用于制造各种器件的结构。

    Method of Manufacturing Semiconductor Device
    4.
    发明申请
    Method of Manufacturing Semiconductor Device 失效
    制造半导体器件的方法

    公开(公告)号：US20080254606A1

    公开(公告)日：2008-10-16

    申请号：US12090891

    申请日：2006-12-04

    申请人： In Bok Baek ,  Seong Jae Lee ,  Jong Heon Yang ,  Chang Geun Ahn ,  Han Young Yu ,  Ki Ju Im

    发明人： In Bok Baek ,  Seong Jae Lee ,  Jong Heon Yang ,  Chang Geun Ahn ,  Han Young Yu ,  Ki Ju Im

    IPC分类号： H01L21/28

    CPC分类号： H01L29/66439 ,  B82Y10/00 ,  H01L21/0273 ,  H01L21/28123 ,  H01L29/66484 ,  H01L29/66545 ,  H01L29/66575 ,  H01L29/66772 ,  H01L29/7613 ,  H01L29/7831

    摘要： Provided is a method of manufacturing a semiconductor device in which properties of photoresist through a lithography process are changed to form a dummy structure, and the structure is applied to a process of forming a gate electrode. The method includes the steps of: forming a buffer layer on the top of a semiconductor substrate; applying an inorganic photoresist on the buffer layer, and forming a photoresist pattern using a lithography process; thermally treating the photoresist pattern using a predetermined gas; uniformly depositing an insulating layer on the thermally treated structure, and etching the deposited layer by the deposited thickness in order to expose the thermally treated photoresist pattern; depositing an insulating layer on the etched structure, and etching the deposited insulating layer to expose the thermally treated photoresist pattern; removing the exposed photoresist pattern using an etching process; forming a gate oxide layer in the portion in which the photoresist pattern is removed; and forming a gate electrode on the gate oxide layer. Accordingly, in forming a structure for manufacturing a nano-sized device, the properties of the layer formed by a lithography process are improved through thermal treatment, and thus the structure used to manufacture various devices can be easily formed.

    摘要翻译： 提供了通过光刻处理改变光致抗蚀剂的特性以形成虚拟结构的半导体器件的制造方法，并且将该结构应用于形成栅电极的工艺。 该方法包括以下步骤：在半导体衬底的顶部上形成缓冲层; 在缓冲层上施加无机光致抗蚀剂，并使用光刻工艺形成光致抗蚀剂图案; 使用预定气体热处理光刻胶图案; 在热处理结构上均匀沉积绝缘层，并通过沉积的厚度蚀刻沉积层，以暴露热处理的光致抗蚀剂图案; 在蚀刻的结构上沉积绝缘层，并蚀刻沉积的绝缘层以暴露热处理的光致抗蚀剂图案; 使用蚀刻工艺去除曝光的光致抗蚀剂图案; 在除去光致抗蚀剂图案的部分中形成栅氧化层; 以及在所述栅极氧化物层上形成栅电极。 因此，在形成纳米尺寸器件的制造结构时，通过热处理提高了通过光刻工艺形成的层的性质，因此可以容易地形成用于制造各种器件的结构。

    Semiconductor nanowire sensor device and method for manufacturing the same
    5.
    发明授权
    Semiconductor nanowire sensor device and method for manufacturing the same 有权
    半导体纳米线传感器装置及其制造方法

    公开(公告)号：US08241939B2

    公开(公告)日：2012-08-14

    申请号：US12682571

    申请日：2008-07-24

    申请人： Chan Woo Park ,  Chang Geun Ahn ,  Jong Heon Yang ,  In Bok Baek ,  Chil Seong Ah ,  Han Young Yu ,  An Soon Kim ,  Tae Youb Kim ,  Moon Gyu Jang ,  Myung Sim Jun

    发明人： Chan Woo Park ,  Chang Geun Ahn ,  Jong Heon Yang ,  In Bok Baek ,  Chil Seong Ah ,  Han Young Yu ,  An Soon Kim ,  Tae Youb Kim ,  Moon Gyu Jang ,  Myung Sim Jun

    IPC分类号： H01L21/00 ,  H01L29/06

    CPC分类号： H01L29/0665 ,  B82Y10/00 ,  B82Y15/00 ,  H01L29/0673 ,  H01L29/78696

    摘要： A method for manufacturing a biosensor includes forming a silicon nanowire channel, etching a first conductivity-type single crystalline silicon layer which is a top layer of a Silicon-On-Insulator (SOI) substrate to form a first conductivity-type single crystalline silicon line pattern, doping both sidewalls of the first conductivity-type single crystalline silicon line pattern with impurities of a second conductivity-type opposite to the first conductivity-type to form a second conductivity-type channel, forming second conductivity-type pads for forming electrodes at both ends of the first conductivity-type single crystalline silicon line pattern, forming, in an undoped region of the first conductivity-type single crystalline silicon line pattern, a first electrode for applying a reverse-bias voltage to insulate the first conductivity-type single crystalline silicon line pattern and the second conductivity-type channel from each other, and forming second electrodes for applying a bias voltage across the second conductivity-type channel on the second conductivity-type pad.

    摘要翻译： 制造生物传感器的方法包括形成硅纳米线通道，蚀刻作为绝缘体上硅（SOI）衬底的顶层的第一导电型单晶硅层，以形成第一导电型单晶硅线 以与第一导电类型相反的第二导电类型的杂质掺杂第一导电型单晶硅线图案的两个侧壁以形成第二导电型沟道，形成第二导电型垫，用于在 第一导电型单晶硅线图案的两端，在第一导电型单晶硅线图案的未掺杂区域中形成用于施加反向偏置电压以使第一导电型单晶硅线型图案绝缘的第一电极 晶体硅线图案和第二导电型沟道，并且形成用于施加双面的第二电极 在第二导电型垫上的第二导电类型沟道上的电压。

    Three-dimensional nanodevices including nanostructures
    7.
    发明授权
    Three-dimensional nanodevices including nanostructures 有权
    包括纳米结构在内的三维纳米器件

    公开(公告)号：US08263964B2

    公开(公告)日：2012-09-11

    申请号：US12672995

    申请日：2008-05-19

    申请人： Han Young Yu ,  Byung Hoon Kim ,  An Soon Kim ,  In Bok Baek ,  Chil Seong Ah ,  Jong Heon Yang ,  Chan Woo Park ,  Chang Geun Ahn

    发明人： Han Young Yu ,  Byung Hoon Kim ,  An Soon Kim ,  In Bok Baek ,  Chil Seong Ah ,  Jong Heon Yang ,  Chan Woo Park ,  Chang Geun Ahn

    IPC分类号： H01L29/06

    CPC分类号： H01J49/4205 ,  B81B7/0025 ,  B81B2201/0214 ,  B81B2201/0271 ,  B82Y10/00 ,  B82Y40/00 ,  G01N2291/0257 ,  H01J49/0018 ,  H01L29/0673 ,  H01L29/7613 ,  H01L29/775 ,  H03H2009/02314

    摘要： Provided are three-dimensional (3D) nanodevices including 3D nanostructures. The 3D nanodevice includes at least one nanostructure, each nanostructure including an oscillation portion floating over a substrate and support portions for supporting both lengthwise end portions of the oscillation portion, supports disposed on the substrate to support the support portions of each of the nanostructures, at least one controller disposed at an upper portion of the substrate, a lower portion of the substrate, or both the upper and lower portions of the substrate to control each of the nanostructures, and a sensing unit disposed on each of the oscillation portions to sense an externally supplied adsorption material. Thus, unlike in a typical planar device, generation of impurities between a nanodevice and a substrate can be reduced, and mechanical vibration can be caused. In particular, since 3D nanostructures have mechanical and electrical characteristics, 3D nanodevices including new 3D nanostructures can be provided using nano-electro-mechanical systems (NEMS). Also, a single electron device, a spin device, or a single electron transistor (SET)-field effect transistor (FET) hybrid device can be formed using a simple process unlike in planar devices.

    摘要翻译： 提供了三维（3D）纳米器件，包括3D纳米结构。 3D纳米装置包括至少一个纳米结构，每个纳米结构包括漂浮在基板上的振荡部分和支撑部分，用于支撑振荡部分的两个纵向端部，支撑件设置在基板上以支撑每个纳米结构的支撑部分， 设置在基板的上部，基板的下部或基板的上部和下部的至少一个控制器，以控制每个纳米结构;以及感测单元，设置在每个振荡部分上以感测 外部供应的吸附材料。 因此，与典型的平面器件不同，可以减少纳米器件与衬底之间的杂质的产生，并且可能引起机械振动。 特别地，由于3D纳米结构具有机械和电学特性，可以使用纳米机电系统（NEMS）提供包括新的3D纳米结构的3D纳米器件。 此外，可以使用与平面器件不同的简单工艺来形成单电子器件，自旋器件或单电子晶体管（SET）场效应晶体管（FET）混合器件。

    THREE-DIMENSIONAL NANODEVICES INCLUDING NANOSTRUCTURES
    9.
    发明申请
    THREE-DIMENSIONAL NANODEVICES INCLUDING NANOSTRUCTURES 有权
    包括纳米结构的三维纳米器件

    公开(公告)号：US20110193052A1

    公开(公告)日：2011-08-11

    申请号：US12672995

    申请日：2008-05-19

    申请人： Han Young Yu ,  Byung Hoon Kim ,  An Soon Kim ,  In Bok Baek ,  Chil Seong Ah ,  Jong Heon Yang ,  Chan Woo Park ,  Chang Geun Ahn

    发明人： Han Young Yu ,  Byung Hoon Kim ,  An Soon Kim ,  In Bok Baek ,  Chil Seong Ah ,  Jong Heon Yang ,  Chan Woo Park ,  Chang Geun Ahn

    IPC分类号： H01L29/06 ,  B82Y99/00

    CPC分类号： H01J49/4205 ,  B81B7/0025 ,  B81B2201/0214 ,  B81B2201/0271 ,  B82Y10/00 ,  B82Y40/00 ,  G01N2291/0257 ,  H01J49/0018 ,  H01L29/0673 ,  H01L29/7613 ,  H01L29/775 ,  H03H2009/02314

    摘要： Provided are three-dimensional (3D) nanodevices including 3D nanostructures. The 3D nanodevice includes at least one nanostructure, each nanostructure including an oscillation portion floating over a substrate and support portions for supporting both lengthwise end portions of the oscillation portion, supports disposed on the substrate to support the support portions of each of the nanostructures, at least one controller disposed at an upper portion of the substrate, a lower portion of the substrate, or both the upper and lower portions of the substrate to control each of the nanostructures, and a sensing unit disposed on each of the oscillation portions to sense an externally supplied adsorption material. Thus, unlike in a typical planar device, generation of impurities between a nanodevice and a substrate can be reduced, and mechanical vibration can be caused. In particular, since 3D nanostructures have mechanical and electrical characteristics, 3D nanodevices including new 3D nanostructures can be provided using nano-electro-mechanical systems (NEMS). Also, a single electron device, a spin device, or a single electron transistor (SET)-field effect transistor (FET) hybrid device can be formed using a simple process unlike in planar devices.

    摘要翻译： 提供了三维（3D）纳米器件，包括3D纳米结构。 3D纳米装置包括至少一个纳米结构，每个纳米结构包括漂浮在基板上的振荡部分和支撑部分，用于支撑振荡部分的两个纵向端部，支撑件设置在基板上以支撑每个纳米结构的支撑部分， 设置在基板的上部，基板的下部或基板的上部和下部的至少一个控制器，以控制每个纳米结构;以及感测单元，设置在每个振荡部分上以感测 外部供应的吸附材料。 因此，与典型的平面器件不同，可以减少纳米器件与衬底之间的杂质的产生，并且可能引起机械振动。 特别地，由于3D纳米结构具有机械和电学特性，可以使用纳米机电系统（NEMS）提供包括新的3D纳米结构的3D纳米器件。 此外，可以使用与平面器件不同的简单工艺来形成单电子器件，自旋器件或单电子晶体管（SET）场效应晶体管（FET）混合器件。