Counter driven RAM engine control
    1.
    发明授权
    Counter driven RAM engine control 失效
    计数器驱动RAM引擎控制

    公开(公告)号:US4956781A

    公开(公告)日:1990-09-11

    申请号:US310174

    申请日:1989-02-15

    IPC分类号: F02D41/26 F02D41/36

    摘要: A system provides for controlling various vehicle functions by use of a free-running counter that drives the address lines of a random access memory which are shared with a control microprocessor. The counter represents a clock which directly maps addresses in the RAM to discrete moments in time. Each bit at each RAM memory location describes an on or off control command of a particular function. The microprocessor sets selected bits corresponding to the control function in two address locations corresponding to the on and off points in time so as to enable the generation of a pulse of exact direction for control.

    摘要翻译: 系统通过使用驱动与控制微处理器共享的随机存取存储器的地址线的自由运行计数器来控制各种车辆功能。 计数器表示将RAM中的地址直接映射到离散时刻的时钟。 每个RAM存储器位置的每个位描述特定功能的开或关控制命令。 微处理器将对应于控制功能的所选位置设置在对应于接通和关断点的两个地址位置中,以便能够产生用于控制的精确方向的脉冲。