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公开(公告)号：US11610559B2
公开(公告)日：2023-03-21
申请号：US16836295
申请日：2020-03-31
发明人： Xingyi Liu , Yongxian Xie , Wei Feng , Yanchun Lu , Jideng Zhou
摘要： The present disclosure discloses a shift register unit and a threshold voltage compensation method thereof, a driving circuit and a display apparatus. The shift register unit includes a cascaded output circuit coupled to a pull-up node, a clock signal input terminal, and a cascaded signal output terminal. The shift register unit is configured to transmit a clock signal from the clock signal input terminal to the cascaded signal output terminal under control of the pull-up node. A compensation circuit has a voltage output terminal coupled to the pull-up node, and is configured to provide an output voltage signal through the voltage output terminal during a blanking phase of a frame. The output voltage signal drives reverse drift of a threshold voltage of the cascaded output circuit.
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公开(公告)号：US11328641B2
公开(公告)日：2022-05-10
申请号：US16839413
申请日：2020-04-03
发明人： Zhiyang He , Mindong Zheng , Youlu Li , Yongxian Xie , Qiang Liu , Hui Wang
摘要： A shift register unit, a driving method thereof, a gate driving circuit, and a display device are provided. The shift register unit includes an input branch and a reset branch; the input branch is configured to form or disconnect a first path between a first scan voltage terminal and a pull-up node under control of a potential of a first control terminal. The reset branch is configured to form or disconnect a second path between a second scan voltage terminal and the pull-up node under control of a potential of a second control terminal.
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公开(公告)号：US11132934B2
公开(公告)日：2021-09-28
申请号：US16641737
申请日：2019-08-16
发明人： Yongxian Xie , Jinliang Liu , Hui Wang , Miao Zhang
IPC分类号： G09G3/20
摘要： A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, an output circuit, and a first node control circuit. The input circuit is configured to charge a first node in response to an input signal; the output circuit is configured to output an output signal at an output terminal under control of a level signal of the first node; and the first node control circuit is configured to receive a precharge control signal from a precharge control terminal and charge the first node in response to the precharge control signal before the output terminal outputs the output signal.
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公开(公告)号：US20210035517A1
公开(公告)日：2021-02-04
申请号：US16836295
申请日：2020-03-31
发明人： Xingyi Liu , Yongxian Xie , Wei Feng , Yanchun Lu , Jideng Zhou
摘要： The present disclosure discloses a shift register unit and a threshold voltage compensation method thereof, a driving circuit and a display apparatus. The shift register unit includes a cascaded output circuit coupled to a pull-up node, a clock signal input terminal, and a cascaded signal output terminal. The shift register unit is configured to transmit a clock signal from the clock signal input terminal to the cascaded signal output terminal under control of the pull-up node. A compensation circuit has a voltage output terminal coupled to the pull-up node, and is configured to provide an output voltage signal through the voltage output terminal during a blanking phase of a frame. The output voltage signal drives reverse drift of a threshold voltage of the cascaded output circuit.
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公开(公告)号：US20240127732A1
公开(公告)日：2024-04-18
申请号：US18274872
申请日：2022-09-21
发明人： Yongxian Xie , Zhixiang Zou , Feng Qu , Chuanjiang Tang , Tong Yang , Xiaoye Ma , Fengzhen Lv , Ran Zhang
CPC分类号： G09G3/20 , G11C19/28 , G09G2300/0842 , G09G2310/0286
摘要： A shift-register unit, a grid driving circuit and a displaying device, which relates to the technical field of displaying. In the present disclosure, the oxide-semiconductor layers of the oxide thin-film transistors may be delimited into regions according to the total channel widths and the channel lengths required by the oxide thin-film transistors in the shift-register unit, wherein the sum of the widths of the independent semiconductor branches obtained by the delimitation is equal to the required total channel width. Accordingly, one oxide thin-film transistor can realize the required total channel width by using the one or more semiconductor branches, to ensure the normal operation of the oxide thin-film transistor, whereby the oxide-semiconductor layers of the different oxide thin-film transistors can be configured differently, to realize the purpose of reducing the border frame of the displaying device.
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公开(公告)号：US11710435B2
公开(公告)日：2023-07-25
申请号：US16965559
申请日：2019-10-18
发明人： Xingyi Liu , Yongxian Xie , Jideng Zhou , Fengzhen Lv
CPC分类号： G09G3/20 , G11C19/28 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G09G2320/045
摘要： A shift register unit and a driving method thereof, a gate driving circuit, and a display device are provided. In the shift register unit, the input circuit inputs an input signal to a first node; the output circuit outputs an output signal to an output terminal; the first control circuit performs a first control on a level of a first control node; the first noise reduction control circuit controls a level of a second node; the second control circuit performs a second control on a level of a second control node; the second noise reduction control circuit controls a level of a third node; the first voltage-stabilizing circuit performs a third control on the level of the second control node, and the second control and the third control cause at least part of the second noise reduction control circuit to be in different bias states.
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公开(公告)号：US11295693B2
公开(公告)日：2022-04-05
申请号：US16760531
申请日：2019-05-09
发明人： Xingyi Liu , Yongxian Xie , Chengying Cao , Jideng Zhou
摘要： The present disclosure provides a gate driving circuit, a current adjusting method thereof, and a display device. The gate driving circuit includes at least one gate driving sub-circuit. Each gate driving sub-circuit includes an output circuit and a current limiting circuit. The output circuit is configured to output a gate driving signal. The current limiting circuit is electrically connected to the output circuit. The current limiting circuit is configured to limit a current magnitude of the gate driving signal.
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8.发明公开公开(公告)号：US20230162637A1
公开(公告)日：2023-05-25
申请号：US16965559
申请日：2019-10-18
发明人： Xingyi Liu , Yongxian Xie , Jideng Zhou , Fengzhen Lv
CPC分类号： G09G3/20 , G11C19/28 , G09G2310/0286 , G09G2310/0267 , G09G2320/045 , G09G2300/0408
摘要： A shift register unit and a driving method thereof, a gate driving circuit, and a display device are provided. In the shift register unit, the input circuit inputs an input signal to a first node; the output circuit outputs an output signal to an output terminal; the first control circuit performs a first control on a level of a first control node; the first noise reduction control circuit controls a level of a second node; the second control circuit performs a second control on a level of a second control node; the second noise reduction control circuit controls a level of a third node; the first voltage-stabilizing circuit performs a third control on the level of the second control node, and the second control and the third control cause at least part of the second noise reduction control circuit to be in different bias states.
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公开(公告)号：US20210233486A1
公开(公告)日：2021-07-29
申请号：US16760531
申请日：2019-05-09
发明人： Xingyi Liu , Yongxian Xie , Chengying Cao , Jideng Zhou
IPC分类号： G09G3/36
摘要： The present disclosure provides a gate driving circuit, a current adjusting method thereof, and a display device. The gate driving circuit includes at least one gate driving sub-circuit. Each gate driving sub-circuit includes an output circuit and a current limiting circuit. The output circuit is configured to output a gate driving signal. The current limiting circuit is electrically connected to the output circuit. The current limiting circuit is configured to limit a current magnitude of the gate driving signal.
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公开(公告)号：US20210150969A1
公开(公告)日：2021-05-20
申请号：US16641737
申请日：2019-08-16
发明人： Yongxian Xie , Jinliang Liu , Hui Wang , Miao Zhang
IPC分类号： G09G3/20
摘要： A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, an output circuit, and a first node control circuit. The input circuit is configured to charge a first node in response to an input signal; the output circuit is configured to output an output signal at an output terminal under control of a level signal of the first node; and the first node control circuit is configured to receive a precharge control signal from a precharge control terminal and charge the first node in response to the precharge control signal before the output terminal outputs the output signal.
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