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    Semiconductor device equipped with a heat-fusible thin film resistor and production method thereof
    1.
    发明授权
    Semiconductor device equipped with a heat-fusible thin film resistor and production method thereof 失效
    配有热熔薄膜电阻的半导体装置及其制造方法

    公开(公告)号：US5625218A

    公开(公告)日：1997-04-29

    申请号：US491543

    申请日：1995-06-16

    申请人： Hideya Yamadera ,  Takeshi Ohwaki ,  Yasunori Taga ,  Makio Iida ,  Makoto Ohkawa ,  Hirofumi Abe ,  Yoshihiko Isobe

    发明人： Hideya Yamadera ,  Takeshi Ohwaki ,  Yasunori Taga ,  Makio Iida ,  Makoto Ohkawa ,  Hirofumi Abe ,  Yoshihiko Isobe

    IPC分类号： H01L23/525 ,  H01L27/10 ,  H01L29/00

    CPC分类号： H01L23/5256 ,  H01L2924/0002

    摘要： A fuse fusible type semiconductor device capable of reducing energy required for fusing and a production method of the semiconductor device. In a semiconductor device equipped with a heat-fusible thin film resistor, the thin film resistor formed on a substrate 1 through an insulating film 2 is made of chromium, silicon and tungsten, and films 7 and 8 of a insulator including silicon laminated on the upper surface of the fusing surface, aluminum films 5 are disposed on both sides of the fusing surface and a barrier film 4. This semiconductor device is produced by a lamination step of sequentially forming a first insulating film 2, a thin film resistor 3, a barrier film 4 and an aluminum film 5 on a substrate 1 for reducing drastically fusing energy, an etching step of removing the barrier film 4 and the aluminum film 5 from the fusing region 31 of the thin film resistor 3, and an oxide film formation step of depositing the insulator including silicon films 7 and 8.

    摘要翻译： 一种能够降低熔融所需的能量的熔断器熔断型半导体器件和半导体器件的制造方法。 在配备有热熔薄膜电阻器的半导体装置中，通过绝缘膜2形成在基板1上的薄膜电阻由铬，硅和钨制成，并且包含硅的绝缘体的膜7和8层压在 定影表面的上表面，铝膜5设置在定影表面的两侧和阻挡膜4上。该半导体器件通过层叠步骤制造，顺序形成第一绝缘膜2，薄膜电阻3， 阻挡膜4和铝膜5，用于降低显着熔化能的蚀刻步骤，从薄膜电阻器3的熔融区域31去除阻挡膜4和铝膜5的蚀刻步骤以及氧化膜形成步骤 沉积包括硅膜7和8的绝缘体。

    Semiconductor device and process for producing same
    2.
    发明授权
    Semiconductor device and process for producing same 失效
    半导体装置及其制造方法

    公开(公告)号：US5187559A

    公开(公告)日：1993-02-16

    申请号：US661240

    申请日：1991-02-27

    申请人： Yoshihiko Isobe ,  Makio Iida

    发明人： Yoshihiko Isobe ,  Makio Iida

    IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L27/06

    CPC分类号： H01L28/20 ,  H01L27/0688

    摘要： A semiconductor device provided with a polycrystalline silicon resistor containing an impurity in a high concentration and having a resistance adjusted by a current conduction therethrough at a current density of a threshold value or more, which comprises: a polycrystalline silicon resistor containing a first impurity having a negative value of a temperature coefficient of resistance in a high impurity concentration region of said polycrystalline silicon resistor and a second impurity having a positive value of a temperature coefficient of resistance in a high impurity concentration region of the polycrystalline silicon resistor. A process for producing same is also disclosed.

    摘要翻译： 一种半导体器件，其具有含有高浓度的杂质的多晶硅电阻体，所述多晶硅电阻器具有以阈值以上的电流密度通过电流导通而调整的电阻，所述电流密度包括：含有第一杂质的多晶硅电阻， 在多晶硅电阻器的高杂质浓度区域中，所述多晶硅电阻器的高杂质浓度区域的电阻温度系数的负值和具有温度系数的正值的第二杂质。 还公开了其制造方法。

    Programmable non-volatile memory cell
    4.
    发明授权
    Programmable non-volatile memory cell 失效
    可编程非易失性存储单元

    公开(公告)号：US5747846A

    公开(公告)日：1998-05-05

    申请号：US346287

    申请日：1994-11-23

    申请人： Makio Iida ,  Tetsuo Fujii ,  Yoshihiko Isobe

    发明人： Makio Iida ,  Tetsuo Fujii ,  Yoshihiko Isobe

    IPC分类号： H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L27/10

    CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11531

    摘要： A non-volatile memory cell having a structure having improved integration and simplified electrode wiring structure. The programmable non-volatile memory cell of the present invention adopts a mono-layer gate scheme to simplify the electrode wiring structure and to eliminate a current leakage problem of an insulating film between electrodes. A side and bottom of a semiconductor region, which is disposed directly below a capacity electrode section with a gate insulating film interposed therebetween that compose a control electrode, are isolated from another semiconductor region and semiconductor substrate by insulating films. Thus, a high programming control voltage which is not limited by a junction yield voltage between the semiconductor regions and semiconductor substrate may be applied. Due to that, an area of the capacity electrode section of a floating electrode may be considerably reduced.

    摘要翻译： 具有改进的集成和简化的电极布线结构的结构的非易失性存储单元。 本发明的可编程非易失性存储单元采用单层栅极方案来简化电极布线结构，并消除电极之间绝缘膜的漏电问题。 通过绝缘膜将另一个半导体区域的半导体区域和半导体区域的半导体区域和半导体衬底的另一个半导体区域和半导体衬底隔离，其中，半导体区域的一侧和底部直接配置在其间具有构成控制电极的栅极绝缘膜 因此，可以应用不受半导体区域和半导体衬底之间的接合屈服电压限制的高编程控制电压。 因此，浮动电极的电容电极部分的面积可以大大减小。

    Method of making semiconductor device using a trimmable thin-film resistor
    5.
    发明授权
    Method of making semiconductor device using a trimmable thin-film resistor 失效
    使用可调薄膜电阻制造半导体器件的方法

    公开(公告)号：US5284794A

    公开(公告)日：1994-02-08

    申请号：US960298

    申请日：1992-10-13

    申请人： Yoshihiko Isobe ,  Makio Iida ,  Shoji Miura ,  Keizou Kajiura ,  Mikimasa Suzuki ,  Masami Saito

    发明人： Yoshihiko Isobe ,  Makio Iida ,  Shoji Miura ,  Keizou Kajiura ,  Mikimasa Suzuki ,  Masami Saito

    IPC分类号： H01L21/02 ,  H01L21/26

    CPC分类号： H01L28/24 ,  H01L28/40 ,  Y10S148/055 ,  Y10S148/136 ,  Y10S438/94

    摘要： A semiconductor device has a thin-film resistor trimmed by laser. The semiconductor device comprises a semiconductor substrate having an element region that covers at least part of the surface of the semiconductor substrate, a first insulation film disposed on the surface of the semiconductor substrate, and a second insulation film disposed on the surface of the semiconductor substrate through an opening of the first insulation film. The opening is formed by selectively removing at least part of the first insulation film at a location on the surface of the semiconductor substrate where the element region is not involved. The thin-film resistor is formed on the second insulation film.

    摘要翻译： 半导体器件具有通过激光器修整的薄膜电阻器。 半导体器件包括具有覆盖半导体衬底的表面的至少一部分的元件区域的半导体衬底，设置在半导体衬底的表面上的第一绝缘膜和设置在半导体衬底的表面上的第二绝缘膜 通过第一绝缘膜的开口。 通过在不涉及元件区域的半导体衬底的表面上的位置处选择性地去除第一绝缘膜的至少一部分来形成开口。 薄膜电阻器形成在第二绝缘膜上。

    Semiconductor sensor and method of manufacturing the same
    7.
    发明申请
    Semiconductor sensor and method of manufacturing the same 有权
    半导体传感器及其制造方法

    公开(公告)号：US20080202249A1

    公开(公告)日：2008-08-28

    申请号：US12010758

    申请日：2008-01-29

    申请人： Hisanori Yokura ,  Yoshihiko Isobe ,  Eishi Kawasaki

    发明人： Hisanori Yokura ,  Yoshihiko Isobe ,  Eishi Kawasaki

    IPC分类号： G01L9/04 ,  H01C17/28

    CPC分类号： G01L9/0055 ,  G01K5/52 ,  G01L1/2293 ,  H01L2224/02166 ,  Y10T29/49103

    摘要： A semiconductor pressure sensing apparatus includes a metallic stem having a diaphragm and a semiconductor sensor bonded to the diaphragm. The semiconductor sensor includes a gauge section and first and second bonding pads. The gauge section is configured to be deformed according to a deformation of the diaphragm. The first and second bonding pads are respectively connected to different positions of the gauge section so that an electrical resistance between the first and second bonding pads can change with a change in the deformation of the diaphragm. The gauge section is formed to a semiconductor layer of an silicon-on-insulator substrate. The semiconductor sensor is directly bonded to the diaphragm by activating contact surfaces between the semiconductor sensor and the diaphragm.

    摘要翻译： 一种半导体压力感测装置，包括具有隔膜的金属杆和结合到隔膜的半导体传感器。 半导体传感器包括测量部分和第一和第二接合焊盘。 仪表部分被配置为根据隔膜的变形而变形。 第一和第二接合焊盘分别连接到量规部分的不同位置，使得第一和第二接合焊盘之间的电阻随着隔膜变形的改变而改变。 测量部分形成为绝缘体上硅衬底的半导体层。 通过激活半导体传感器和隔膜之间的接触表面，半导体传感器直接接合到隔膜。

    Method of manufacturing semiconductor device
    8.
    发明授权
    Method of manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US06908857B2

    公开(公告)日：2005-06-21

    申请号：US10657081

    申请日：2003-09-09

    申请人： Kazuo Akamatsu ,  Yoshihiko Isobe ,  Hiroyuki Yamane

    发明人： Kazuo Akamatsu ,  Yoshihiko Isobe ,  Hiroyuki Yamane

    IPC分类号： H01L23/52 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532 ,  H01L21/44 ,  H01L21/4763

    CPC分类号： H01L21/7685 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/32051 ,  H01L21/76886 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for manufacturing a semiconductor device having on a silicon substrate semiconductor elements and aluminum (Al) alloy wiring leads as electrically connected thereto is disclosed. The method includes the steps of forming on the silicon substrate an Al alloy layer containing therein copper (Cu), and forming on the Al alloy layer a titanium nitride (TiN) film with enhanced chemical reactivity by using sputtering techniques while applying thereto a DC power of 5.5 W/cm2 or less. Fabrication of such reactivity-rich TiN film on the Al alloy layer results in a reaction layer of Al and Ti being subdivided into several spaced-apart segments. In this case, the reaction layer hardly serves as any diffusion path; thus, it becomes possible to prevent Cu as contained in the Al alloy layer from attempting to outdiffuse with the reaction layer being as its diffusion path. This makes it possible to suppress or minimize unwanted fabrication of AlN on or above the surface of an Al containing lead pattern, thereby enabling increase in electromigration (EM) lifetime of electrical interconnect leads used.

    摘要翻译： 公开了一种制造半导体器件的方法，该半导体器件具有硅衬底半导体元件和与其电连接的铝（Al）合金布线引线。 该方法包括以下步骤：在硅衬底上形成含有铜（Cu）的Al合金层，并且通过使用溅射技术在Al合金层上形成具有增强的化学反应性的氮化钛（TiN）膜，同时施加直流电力 为5.5W / cm 2以下。 在Al合金层上制备这种富含反应性的TiN膜导致Al和Ti的反应层被细分成几个间隔开的段。 在这种情况下，反应层几乎不作为任何扩散路径; 因此，可以防止Al合金层中所含的Cu作为其扩散路径而反向扩散。 这使得可以抑制或最小化在含铝的引线图案的表面上或上方的AlN的不希望的制造，从而能够增加使用的电互连引线的电迁移（EM）寿命。

    Closed battery and closing member
    9.
    发明授权
    Closed battery and closing member 失效
    闭合电池和关闭件

    公开(公告)号：US06423440B1

    公开(公告)日：2002-07-23

    申请号：US09436488

    申请日：1999-11-09

    申请人： Akiyoshi Takada ,  Kinji Saijo ,  Kazuo Yoshida ,  Nobuyuki Yoshimoto ,  Yoshihiko Isobe

    发明人： Akiyoshi Takada ,  Kinji Saijo ,  Kazuo Yoshida ,  Nobuyuki Yoshimoto ,  Yoshihiko Isobe

    IPC分类号： H01M212

    CPC分类号： H01M2/345 ,  H01M2/1241 ,  H01M2/34

    摘要： The object of the present invention is to provide a closed battery capable of rapidly releasing the internal pressure thereof and at the same time disconnecting the current to effectively prevent itself from temperature rising and exploding so that in such a completely closed battery it may assure the safety and reliability thereof, when the internal pressure is elevated due to short circuit, overcharge, reverse charge, or the like. A valve element 5 is provided with a slit 3 between the circumference thereof and a metal substrate 1. When the internal pressure of a battery is elevated, the valve element 5 is smoothly raised up together with a metal foil 2 from a bending fulcrum portion 4 to thereby cut a lead wire 6 or permit a braze portion 8 to detach from the lead wire 6, thus disconnecting the current reliably. Then, the metal foil which usually closes the slit formed around the circumference of the valve element 5 is allowed to burst stably and accurately at a prescribed pressure to thereby form a valve opening portion 7 so that the internal gas of the battery can be discharged.

    摘要翻译： 本发明的目的是提供一种能够快速释放其内部压力并且同时断开电流以有效防止其升高和爆炸的封闭电池，使得在这种完全闭合的电池中可确保安全性 当内部压力由于短路，过充电，反向充电等而升高时的可靠性。 阀元件5在其周边和金属基板1之间设置有狭缝3。当电池的内部压力升高时，阀元件5与金属箔2一起从弯曲支点部分4平滑地升起 从而切断引线6，或者使钎焊部8与引线6分离，从而可靠地断开电流。 然后，通过闭合形成在阀体5的周围的狭缝的金属箔，能够在规定的压力下稳定而准确地突出，从而形成阀开口部7，从而能够排出电池的内部气体。