公开(公告)号：US20120279050A1

公开(公告)日：2012-11-08

申请号：US13462399

申请日：2012-05-02

申请人： Hirohito WATANABE ,  Taiji OGAWA ,  Takaomi Tomonaga ,  Eriko TOMONAGA

发明人： Hirohito WATANABE ,  Taiji OGAWA ,  Takaomi Tomonaga ,  Eriko TOMONAGA

IPC分类号： H05K3/00

CPC分类号： H05K1/0269 ,  H05K3/06 ,  H05K2201/09781 ,  H05K2203/1545 ,  H05K2203/163

摘要： Quickly making changes to etching conditions suppresses the production yield of printed wiring boards from being deteriorated. Disclosed is a method comprising: an etching step that comprises: preparing a conductor-clad base material continuous in a certain direction, the conductor-clad base material (1) having an insulating layer and one or more conductive layers formed on main surfaces of the insulating layer; and subjecting a predetermined region of a conductor layer of one main surface of the conductor-clad base material (1) to an etching process thereby to form a wiring pattern (1a) to be of a product and an inspection pattern (1b) to be used for inspection; a measuring step that measures a line width of the inspection pattern after the etching step; and a control step that controls an etching condition in the etching step based on the measured line width.

摘要翻译： 迅速改变蚀刻条件抑制了印刷电路板的生产成本的恶化。 公开了一种方法，包括：蚀刻步骤，包括：制备在一定方向上连续的导体包覆基材，所述导体包覆基材（1）具有绝缘层和形成在所述导体包覆基材的主表面上的一个或多个导电层 绝缘层; 并对导体包覆基材（1）的一个主表面的导体层的预定区域进行蚀刻处理，从而形成作为产品的布线图案（1a）和检查图案（1b） 用于检验; 测量步骤，其测量所述蚀刻步骤之后的所述检查图案的线宽; 以及控制步骤，其基于所测量的线宽来控制蚀刻步骤中的蚀刻条件。

公开(公告)号：US08574449B2

公开(公告)日：2013-11-05

申请号：US13462399

申请日：2012-05-02

申请人： Hirohito Watanabe ,  Taiji Ogawa ,  Eriko Tomonaga

发明人： Hirohito Watanabe ,  Taiji Ogawa ,  Takaomi Tomonaga

IPC分类号： B44C1/22

CPC分类号： H05K1/0269 ,  H05K3/06 ,  H05K2201/09781 ,  H05K2203/1545 ,  H05K2203/163

摘要： Quickly making changes to etching conditions suppresses the production yield of printed wiring boards from being deteriorated. Disclosed is a method comprising: an etching step that comprises: preparing a conductor-clad base material continuous in a certain direction, the conductor-clad base material (1) having an insulating layer and one or more conductive layers formed on main surfaces of the insulating layer; and subjecting a predetermined region of a conductor layer of one main surface of the conductor-clad base material (1) to an etching process thereby to form a wiring pattern (1a) to be of a product and an inspection pattern (1b) to be used for inspection; a measuring step that measures a line width of the inspection pattern after the etching step; and a control step that controls an etching condition in the etching step based on the measured line width.

摘要翻译： 迅速改变蚀刻条件抑制了印刷电路板的生产成本的恶化。 公开了一种方法，包括：蚀刻步骤，包括：制备在一定方向上连续的导体包覆基材，所述导体包覆基材（1）具有绝缘层和形成在所述导体包覆基材的主表面上的一个或多个导电层 绝缘层; 并且对导体包覆基材（1）的一个主表面的导体层的预定区域进行蚀刻处理，从而形成作为产品的布线图案（1a）和检查图案（1b） 用于检验; 测量步骤，其测量所述蚀刻步骤之后的所述检查图案的线宽; 以及控制步骤，其基于所测量的线宽来控制蚀刻步骤中的蚀刻条件。