Thin film transistor substrate and display device
    3.
    发明授权
    Thin film transistor substrate and display device 有权
    薄膜晶体管基板和显示装置

    公开(公告)号:US08217397B2

    公开(公告)日:2012-07-10

    申请号:US12812913

    申请日:2009-01-15

    CPC分类号: H01L29/458

    摘要: The present invention provides a thin film transistor substrate and a display device in which a decrease in the dry etching rate of a source electrode and drain electrode is not caused; no etching residues are generated; and a barrier metal can be eliminated between a semiconductor layer and metal wires such as the source and drain electrodes. The present invention is a thin film transistor substrate having a semiconductor layer 1, a source electrode 2, a drain electrode 3, and a transparent conductive film 4, in which the source electrode 2 and drain electrode 3 are formed by patterning by means of dry etching and comprises an Al alloy thin film comprising 0.1 to 1.5 atom % of Si and/or Ge, 0.1 to 3.0 atom % of Ni and/or Co, and 0.1 to 0.5 atom % of La and/or Nd, and the thin film transistor is directly connected with the semiconductor layer 1.

    摘要翻译: 本发明提供一种薄膜晶体管基板和显示装置,其中不会引起源电极和漏电极的干蚀刻速率的降低; 不产生蚀刻残留物; 并且可以在半导体层和诸如源极和漏极之类的金属线之间消除阻挡金属。 本发明是一种具有半导体层1,源电极2,漏电极3和透明导电膜4的薄膜晶体管基板,其中源电极2和漏电极3通过干式图案形成 并且包括包含0.1至1.5原子%的Si和/或Ge,0.1至3.0原子%的Ni和/或Co,以及0.1至0.5原子%的La和/或Nd的Al合金薄膜,并且薄膜 晶体管与半导体层1直接连接。

    THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE
    4.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE 有权
    薄膜晶体管基板和显示器件

    公开(公告)号:US20100295053A1

    公开(公告)日:2010-11-25

    申请号:US12812913

    申请日:2009-01-15

    IPC分类号: H01L33/00 H01L29/786

    CPC分类号: H01L29/458

    摘要: The present invention provides a thin film transistor substrate and a display device in which a decrease in the dry etching rate of a source electrode and drain electrode is not caused; no etching residues are generated; and a barrier metal can be eliminated between a semiconductor layer and metal wires such as the source and drain electrodes. The present invention is a thin film transistor substrate having a semiconductor layer 1, a source electrode 2, a drain electrode 3, and a transparent conductive film 4, in which the source electrode 2 and drain electrode 3 are formed by patterning by means of dry etching and comprises an Al alloy thin film comprising 0.1 to 1.5 atom % of Si and/or Ge, 0.1 to 3.0 atom % of Ni and/or Co, and 0.1 to 0.5 atom % of La and/or Nd, and the thin film transistor is directly connected with the semiconductor layer 1.

    摘要翻译: 本发明提供一种薄膜晶体管基板和显示装置,其中不会引起源电极和漏电极的干蚀刻速率的降低; 不产生蚀刻残留物; 并且可以在半导体层和诸如源极和漏极之类的金属线之间消除阻挡金属。 本发明是一种具有半导体层1,源电极2,漏电极3和透明导电膜4的薄膜晶体管基板,其中源电极2和漏电极3通过干式图案形成 并且包括包含0.1至1.5原子%的Si和/或Ge,0.1至3.0原子%的Ni和/或Co,以及0.1至0.5原子%的La和/或Nd的Al合金薄膜,并且薄膜 晶体管与半导体层1直接连接。

    Cu alloy wiring film, TFT element for flat-panel display using the Cu alloy wiring film, and Cu alloy sputtering target for depositing the Cu alloy wiring film
    7.
    发明授权
    Cu alloy wiring film, TFT element for flat-panel display using the Cu alloy wiring film, and Cu alloy sputtering target for depositing the Cu alloy wiring film 有权
    Cu合金布线膜,使用Cu合金布线膜的平板显示用TFT元件和Cu合金布线膜的Cu合金溅射靶

    公开(公告)号:US07994503B2

    公开(公告)日:2011-08-09

    申请号:US12517362

    申请日:2007-12-04

    IPC分类号: H01L29/04

    摘要: An object of the present invention is to provide: a Cu alloy wiring film that makes it possible to use Cu having a low electrical resistivity as a wiring material, exhibit a high adhesiveness to a glass substrate, and avoid the danger of peel off from the glass substrate; a TFT element for a flat-panel display produced with the Cu alloy wiring film; and a Cu alloy sputtering target used for the deposition of the Cu alloy wiring film. The present invention is a wiring film 2 composing a TFT element 1 for a flat-panel display and a sputtering target used for the deposition of the film and the material comprises Cu as the main component and at least one element selected from the group consisting of Pt, Ir, Pd, and Sm by 0.01 to 0.5 atomic percent in total. The wiring film 2 is layered on a glass substrate 3 and further a transparent conductive film 5 is layered thereon while an insulating film 4 is interposed in between.

    摘要翻译: 本发明的目的是提供:可以使用具有低电阻率的Cu作为布线材料的Cu合金布线膜,对玻璃基板表现出高粘合性,并且避免了从玻璃基板剥离的危险 玻璃基板; 用Cu合金布线膜制造的平板显示器用TFT元件; 以及用于沉积Cu合金布线膜的Cu合金溅射靶。 本发明是构成用于平板显示器的TFT元件1和用于沉积膜的溅射靶的布线膜2,并且该材料包括Cu作为主要成分和至少一种选自以下的元素: Pt,Ir,Pd和Sm总计为0.01〜0.5原子%。 布线膜2层叠在玻璃基板3上,另外,在其间插入有绝缘膜4,并且层叠透明导电膜5。

    CU ALLOY WIRING FILM, TFT ELEMENT FOR FLAT-PANEL DISPLAY USING THE CU ALLOY WIRING FILM, AND CU ALLOY SPUTTERING TARGET FOR DEPOSITING THE CU ALLOY WIRING FILM
    8.
    发明申请
    CU ALLOY WIRING FILM, TFT ELEMENT FOR FLAT-PANEL DISPLAY USING THE CU ALLOY WIRING FILM, AND CU ALLOY SPUTTERING TARGET FOR DEPOSITING THE CU ALLOY WIRING FILM 有权
    CU合金线,用于使用铜合金线的平板显示器的TFT元件和用于沉积铜合金接线的CU合金溅射靶

    公开(公告)号:US20100012935A1

    公开(公告)日:2010-01-21

    申请号:US12517362

    申请日:2007-12-04

    摘要: An object of the present invention is to provide: a Cu alloy wiring film that makes it possible to use Cu having a low electrical resistivity as a wiring material, exhibit a high adhesiveness to a glass substrate, and avoid the danger of peel off from the glass substrate; a TFT element for a flat-panel display produced with the Cu alloy wiring film; and a Cu alloy sputtering target used for the deposition of the Cu alloy wiring film.The present invention is a wiring film 2 composing a TFT element 1 for a flat-panel display and a sputtering target used for the deposition of the film and the material comprises Cu as the main component and at least one element selected from the group consisting of Pt, Ir, Pd, and Sm by 0.01 to 0.5 atomic percent in total. The wiring film 2 is layered on a glass substrate 3 and further a transparent conductive film 5 is layered thereon while an insulating film 4 is interposed in between.

    摘要翻译: 本发明的目的是提供:可以使用具有低电阻率的Cu作为布线材料的Cu合金布线膜,对玻璃基板表现出高粘合性,并且避免了从玻璃基板剥离的危险 玻璃基板; 用Cu合金布线膜制造的平板显示器用TFT元件; 以及用于沉积Cu合金布线膜的Cu合金溅射靶。 本发明是构成用于平板显示器的TFT元件1和用于沉积膜的溅射靶的布线膜2,并且该材料包括Cu作为主要成分和至少一种选自以下的元素: Pt,Ir,Pd和Sm总计为0.01〜0.5原子%。 布线膜2层叠在玻璃基板3上,另外,在其间插入有绝缘膜4,并且层叠透明导电膜5。