公开(公告)号：US20210042828A1

公开(公告)日：2021-02-11

申请号：US16885365

申请日：2020-05-28

申请人： Hitachi, Ltd.

发明人： Hiroki SATOH ,  Toshiomi MORIKI

IPC分类号： G06Q40/04 ,  G06Q20/06 ,  G06Q20/36 ,  G06Q20/40 ,  G06F16/21

摘要： An electronic community currency operation system S includes a user terminal 1, a store terminal 2 and a management server 3 connected via a network CN1. The management server 3 includes a premium amount determination unit F38 which receives, from the user terminal 1, an issue request of an electronic community currency received from a user, and determines an additional amount to be added to an issue amount of the electronic community currency, which is to be issued according to the received issue request, according to a current amount of circulation relative to an overall maximum issue of the electronic community currency, and a community currency issuing unit F35 which issues, according to the issue request, the electronic community currency in which the determined additional amount has been added to the issue amount, and notifies the issued electronic community currency to the user terminal 1.

公开(公告)号：US20140059389A1

公开(公告)日：2014-02-27

申请号：US13888670

申请日：2013-05-07

申请人： HITACHI, LTD.

发明人： Naoya HATTORI ,  Toshiomi MORIKI

IPC分类号： G06F11/07

CPC分类号： G06F11/079 ,  G06F11/0724 ,  G06F11/073 ,  G06F11/0772 ,  G06F11/202

摘要： In a memory inspection in a computer installing a x86 CPU, system software related to low-frequent processing is prevented from going down, and the suppression of performance degradation and the avoidance of a reduction in memory capacity by the memory inspection is realized. The computer having a processor, a memory, and an I/O device. The memory stores a system software realizing a system control unit, and an inspection program realizing an inspection unit. The processor has a memory fault notifying unit notifying the system control unit of a fault address. The system control unit includes an adjustment unit that determines whether the inspection program needs to be executed, or not, based on the type of event occurring, plural event processing units processing the event by using different storage areas of the memory, a fault recording unit recording the memory fault, and an event processing unit selector.

摘要翻译： 在安装x86 CPU的计算机的存储器检查中，防止与低频处理相关的系统软件下降，并且实现了通过存储器检查来降低性能下降和避免存储器容量降低的抑制。 具有处理器，存储器和I / O设备的计算机。 存储器存储实现系统控制单元的系统软件和实现检查单元的检查程序。 处理器具有存储器故障通知单元，通知系统控制单元的故障地址。 系统控制单元包括：调整单元，其基于所发生的事件的类型确定是否需要执行检查程序;多个事件处理单元，通过使用存储器的不同存储区域来处理事件;故障记录单元 记录存储器故障，以及事件处理单元选择器。

公开(公告)号：US20170277632A1

公开(公告)日：2017-09-28

申请号：US15505734

申请日：2014-10-30

申请人： Hitachi, Ltd.

发明人： Toshiomi MORIKI ,  Naoya HATTORI ,  Takayuki IMADA

IPC分类号： G06F12/08 ,  G06F12/02 ,  G06F9/455

CPC分类号： G06F12/08 ,  G06F9/45558 ,  G06F9/5077 ,  G06F12/0223 ,  G06F12/1036 ,  G06F12/109 ,  G06F2009/45583 ,  G06F2212/1004 ,  G06F2212/1024 ,  G06F2212/151 ,  G06F2212/651 ,  G06F2212/652 ,  G06F2212/684

摘要： A hypervisor that allocates the computer resource of a physical computer to one or more logical partitions allocates the computer resource to be allocated to the logical partitions to the logical partitions; generates, as address conversion information, the relationship between a guest physical address and a host physical address with respect to a memory of the computer resource; enables a first address conversion portion of a processor using the address conversion information; disables the first address conversion portion after the starting of a guest OS is completed; and causes an application to be executed.

公开(公告)号：US20170123835A1

公开(公告)日：2017-05-04

申请号：US15244144

申请日：2016-08-23

申请人： Hitachi, Ltd.

发明人： Kazuhiko MIZUNO ,  Toshiomi MORIKI ,  Takayuki IMADA

IPC分类号： G06F9/455 ,  G06F9/50

CPC分类号： G06F9/45558 ,  G06F9/5077 ,  G06F9/544 ,  G06F2009/45579 ,  G06F2009/45583 ,  G06F2009/45595

摘要： In a method of controlling a communication path among a plurality of virtual machines operating in one or more physical machines each of which includes one or more CPUs, memories, and I/O devices, allocating a virtual buffer serving as an alias of an actual buffer of a first virtual machine to a communication port that serves as a destination to which a communication path is changed from the first virtual machine and a second virtual machine directly or indirectly communicates with using a communication path change instruction as a trigger. Then, performing memory address translation on a region of the memory referred to by the virtual buffer, and generating the communication path between the first virtual machine and the second virtual machine by associating a region of the memory referred to by the first virtual machine and a region of the memory referred to by the second virtual machine.

公开(公告)号：US20140359267A1

公开(公告)日：2014-12-04

申请号：US14252805

申请日：2014-04-15

申请人： Hitachi, Ltd.

发明人： Toshiomi MORIKI ,  Takayuki IMADA ,  Naoya HATTORI

IPC分类号： G06F9/44

CPC分类号： G06F9/441 ,  G06F9/4405 ,  G06F9/45533

摘要： A computer system with a plurality of processors having a hardware-assisted virtualization and a memory, the computer system including a first processor group of the processors having hardware-assisted virtualization set disabled, and a second processor group of the processors and having hardware-assisted virtualization set enabled, the method having: booting a first OS by assigning the first processor group to the first OS; booting a virtual machine monitor to boot a virtual machine by assigning the second processor group to the virtual machine monitor; performed by the virtual machine monitor, booting a second OS by assigning a certain area of the memory to the second OS; and performed by the virtual machine monitor, setting a data path through which the first OS and second OS communicate with each other, the data path being set in the memory.

摘要翻译： 一种具有多个具有硬件辅助虚拟化和存储器的处理器的计算机系统，所述计算机系统包括具有硬件辅助虚拟化集禁用的处理器的第一处理器组以及处理器的第二处理器组并具有硬件辅助 启用虚拟化集，该方法具有：通过将第一处理器组分配给第一OS来引导第一OS; 通过将第二处理器组分配给虚拟机监视器来引导虚拟机监视器来引导虚拟机; 由所述虚拟机监视器执行，通过将所述存储器的特定区域分配给所述第二OS来引导第二OS; 并且由虚拟机监视器执行，设置第一OS和第二OS彼此通信的数据路径，数据路径被设置在存储器中。

公开(公告)号：US20210294914A1

公开(公告)日：2021-09-23

申请号：US17263666

申请日：2019-07-01

申请人： HITACHI, LTD.

发明人： Hirofumi NAGANO ,  Masayuki OYAMATSU ,  Shohei YAMAGATA ,  Toshiomi MORIKI

IPC分类号： G06F21/62 ,  G06F9/46 ,  H04L9/32

摘要： A traceability information management server includes: a transaction reception part that receives transaction data from a user client, the transaction data containing information on a completed process in distribution of a product and a concerned party in the completed process; an access right information generation part that generates access right information, the access right information being information on a relation between the completed process, the concerned party in the completed process, and a predetermined access right of the concerned party; an access right determination part that identifies, based on the access right information, information on a process in the distribution to which a sender of the received information provision request from the user client has an access right; and an information transmission part that transmits the identified information on the process to the user client that has sent the information provision request.

公开(公告)号：US20150120979A1

公开(公告)日：2015-04-30

申请号：US14528529

申请日：2014-10-30

申请人： Hitachi, Ltd.

发明人： Takayuki IMADA ,  Toshiomi MORIKI

IPC分类号： G06F9/30 ,  G06F13/24

CPC分类号： G06F13/24 ,  G06F9/4406 ,  G06F9/45558 ,  G06F2009/45575 ,  Y02D10/14

摘要： A computer, having: a first OS to which a first processor core group is allocated; and a virtualization module to which a second processor core group is allocated, wherein a virtualization module registers interrupt handler processing for resetting the second processor core group, wherein a first OS has: a monitoring module for monitoring the virtualization module; and an interrupt control module for obtaining identifiers of the second processor core group at a time of booting of the virtualization module, and, when the monitoring module determines to reboot the virtualization module, issuing resetting interrupt to the processor cores of the second processor core group that are associated with the kept identifiers, wherein the second processor core group receives the resetting interrupt and executes the interrupt handler processing to reset its own processor cores, wherein the interrupt control module issues startup interrupt to the second processor core group.

摘要翻译： 一种计算机，具有：分配有第一处理器核心组的第一OS; 以及虚拟化模块，第二处理器核心组被分配给虚拟化模块，其中，虚拟化模块注册用于重置所述第二处理器核心组的中断处理程序处理，其中第一OS具有：用于监视所述虚拟化模块的监视模块; 以及中断控制模块，用于在虚拟化模块启动时获取第二处理器核心组的标识符，并且当监视模块确定重启虚拟化模块时，向第二处理器核心组的处理器核发出重置中断 与所述保持的标识符相关联，其中所述第二处理器核心组接收所述重置中断并执行所述中断处理程序处理以重置其自己的处理器核，其中所述中断控制模块向第二处理器核心组发出启动中断。

公开(公告)号：US20180203805A1

公开(公告)日：2018-07-19

申请号：US15741704

申请日：2015-07-08

申请人： HITACHI, LTD.

发明人： Yukari HATTA ,  Norimitsu HAYAKAWA ,  Takao TOTSUKA ,  Toshiomi MORIKI ,  Satoshi KINUGAWA

IPC分类号： G06F12/109 ,  G06F9/50 ,  G06F9/54

CPC分类号： G06F12/109 ,  G06F9/45545 ,  G06F9/45558 ,  G06F9/50 ,  G06F9/54 ,  G06F9/541 ,  G06F9/544 ,  G06F11/08 ,  G06F2009/45583 ,  G06F2212/1044 ,  G06F2212/151 ,  G06F2212/152 ,  G06F2212/657

摘要： A computer on which OSs run is coupled to the storage apparatus, the OSs include a first OS controlling access to the storage apparatus and a second OS generating a virtual computer. A logically divided computer resources are allocated to the first OS and the second OS respectively. A third OS for executing an application runs on the virtual computer. The second OS has a shared region management part managing a shared region that is a memory region used for communication between the application and the first OS. The third operating system has an agent requesting the second operating system to secure the shared region based on a request from the application and mapping the secured shared region to a guest virtual address space.

公开(公告)号：US20150169346A1

公开(公告)日：2015-06-18

申请号：US14633991

申请日：2015-02-27

申请人： HITACHI, LTD.

发明人： Toshiomi MORIKI ,  Naoya HATTORI ,  Yuji TSUSHIMA

IPC分类号： G06F9/455

CPC分类号： G06F9/45545 ,  G06F9/45558 ,  G06F2009/45566 ,  G06F2009/45575

摘要： A next-generation OS with a virtualization feature is executed as a user program on a first virtual processor by selecting, in response to a cause of a call for a host VMM, one of a guest status area (221) for executing a user program on a second virtual processor and a host status area (222) for executing the guest VMM, and by updating a guest status area (131) of a shadow VMCS for controlling a physical processor. Accordingly, without a decrease in performance of a virtual computer, the next-generation OS incorporating the virtualization feature is executed on a virtual server, and the next-generation OS and an existing OS are integrated on a single physical computer.

摘要翻译： 通过选择响应于对主机VMM的呼叫的原因，通过选择用于执行用户程序的访客状态区域（221）中的一个来执行具有虚拟化功能的下一代OS作为第一虚拟处理器上的用户程序 在用于执行客户VMM的第二虚拟处理器和主机状态区域（222）上，并且通过更新用于控制物理处理器的影子VMCS的访客状态区域（131）。 因此，在不降低虚拟计算机性能的情况下，在虚拟服务器上执行并入虚拟化特征的下一代OS，将下一代OS和现有OS集成在单个物理计算机上。

公开(公告)号：US20150026678A1

公开(公告)日：2015-01-22

申请号：US14275183

申请日：2014-05-12

申请人： Hitachi, Ltd.

发明人： Takayuki IMADA ,  Toshiomi MORIKI ,  Naoya HATTORI

IPC分类号： G06F9/455

CPC分类号： G06F9/45533

摘要： A first processor group of physical processors having hardware-assisted virtualization set disabled among the plurality of physical processors; a second processor group of physical processors having the hardware-assisted virtualization set enabled among the plurality of physical processors; a first OS to which the first processor group is allocated; and a virtualization part to which the second processor group is allocated, the virtualization part is configured to: allocate a predetermined area within the memory and a predetermined one of the plurality of physical processors within the second processor group to the second OS as the virtualized processor, and boot the second OS to be provided as the virtual machine; and set a shared area, which is readable/writable by both the first OS and the virtualization part, and set interrupt routing information comprising a correspondence relationship between a logical interrupt to the second OS and a physical interrupt thereto.

摘要翻译： 具有在多个物理处理器中禁用硬件辅助虚拟化的物理处理器的第一处理器组; 物理处理器的第二处理器组，其具有在所述多个物理处理器中启用的所述硬件辅助虚拟化集; 分配第一处理器组的第一OS; 以及分配第二处理器组的虚拟化部分，虚拟化部分被配置为：将第二处理器组内的预定区域和第二处理器组内的多个物理处理器中的预定区域分配给第二OS作为虚拟处理器 并引导要作为虚拟机提供的第二个操作系统; 并且设置由第一OS和虚拟化部分都可读/写的共享区域，并且设置包括逻辑中断与第二OS之间的对应关系的中断路由信息和对其的物理中断。