公开(公告)号：US20090164183A1

公开(公告)日：2009-06-25

申请号：US12037753

申请日：2008-02-26

申请人： Howard Smith ,  Lijun Jiang ,  Alina Deutsch ,  Kaushik Chanda ,  Barry Jay Rubin ,  Jason Gill ,  Seshadri K. Kolluri

发明人： Howard Smith ,  Lijun Jiang ,  Alina Deutsch ,  Kaushik Chanda ,  Barry Jay Rubin ,  Jason Gill ,  Seshadri K. Kolluri

IPC分类号： G06G7/122

CPC分类号： G06F17/5036 ,  G06F17/5018 ,  G06F2217/80

摘要： A method and apparatus for thermal modeling of on-chip interconnects using electromagnetic tools to determine a temperature profile across the interconnect structure and the temperature at each node of an equivalent thermal circuit derived from an electrical model.

摘要翻译： 一种用于使用电磁工具来确定跨互连结构的温度分布和来自电气模型的等效热电路的每个节点处的温度的片上互连的热建模的方法和装置。

公开(公告)号：US06192507B1

公开(公告)日：2001-02-20

申请号：US09085159

申请日：1998-05-27

申请人： Albert Emil Ruehli ,  Barry Jay Rubin

发明人： Albert Emil Ruehli ,  Barry Jay Rubin

IPC分类号： G06F1750

CPC分类号： G06F17/5036

摘要： A method comprising a computational procedure for obtaining capacitances for three-dimensional geometries which include multiple regions with different dielectric constants. The methodology is not limited to uniform dielectrics. The dielectric regions can also consist of non-uniform and/or anisotropic materials.

摘要翻译： 一种包括用于获得三维几何形状的电容的计算程序的方法，其包括具有不同介电常数的多个区域。 该方法不限于均匀的电介质。 电介质区域也可以由不均匀和/或各向异性材料组成。

公开(公告)号：US4120035A

公开(公告)日：1978-10-10

申请号：US825123

申请日：1977-08-16

申请人： Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

发明人： Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

IPC分类号： G06G7/16 ,  G11C27/04 ,  H01L21/339 ,  H01L29/76 ,  H01L29/762 ,  H03H15/02 ,  H03K5/159

CPC分类号： G11C27/04 ,  G06G7/16 ,  H01L29/76 ,  H03H15/02 ,  H03H2015/026

摘要： A charge coupled device analog multiplier is used to weigh the sampled and delayed signals for a transversal filter. The digital filter coefficients for the analog multiplier can be electrically programmed and therefore dynamic time-varying systems, such as matched filters, can be designed with reduced circuit complexity. The digital filter includes means for sampling without destroying an analog signal at various points and providing voltages proportional to each sampled signal. The voltages are separately applied to a charge coupled device analog multiplier which accepts the voltages and provides means for multiplying the digital filter coefficient by the analog voltage. The multiplied sample signal is then dumped into a means for summing all of the weighted sample signals to produce an analog signal modified by the digital filter coefficients.

摘要翻译： 电荷耦合器件模拟乘法器用于对横向滤波器的采样和延迟信号进行称重。 模拟乘法器的数字滤波器系数可以进行电气编程，因此可以设计具有降低的电路复杂度的动态时变系统，例如匹配滤波器。 数字滤波器包括用于采样的装置，而不破坏各个点处的模拟信号并提供与每个采样信号成比例的电压。 电压分别施加到接收电压的电荷耦合器件模拟乘法器，并提供将数字滤波器系数乘以模拟电压的装置。 然后将相乘的采样信号转储成用于对所有加权采样信号求和的装置，以产生由数字滤波器系数修改的模拟信号。

公开(公告)号：US07038553B2

公开(公告)日：2006-05-02

申请号：US10264893

申请日：2002-10-03

申请人： Robert Barton Garner ,  Winfried Wolfgang Wilcke ,  Barry Jay Rubin ,  Howard Kahn

发明人： Robert Barton Garner ,  Winfried Wolfgang Wilcke ,  Barry Jay Rubin ,  Howard Kahn

IPC分类号： H01P1/00

CPC分类号： G06F1/18 ,  H01L23/48 ,  H01L25/105 ,  H01L2225/1005 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10S439/95 ,  H01L2924/00

摘要： A scalable and compact computer system of three-dimensional subsystems each having capacitive couplers on its external surfaces for transmitting and receiving electrical signals to and from adjacent subsystems. Each surface having an electrically non-conducting substrate, one or more electrically conducting pads on the substrate, and electrical leads for coupling the pads to the subsystem's circuits. Two adjacent pads, each from a different subsystem, form a capacitive coupler to carry the signals between the subsystems. The pads are covered by a low-loss dielectric material having a large dielectric constant for improved signal transmission. A differential signal may be supported using two capacitive couplers to respectively carry the positive and negative signals of the differential signal. The subsystems might be replaced or left in place when they failed. Additional subsystems might be added to the system to expand its capacity.

摘要翻译： 三维子系统的可扩展和紧凑的计算机系统，每个子系统在其外表面上具有电容耦合器，用于向相邻子系统发送和接收电信号。 每个表面具有非导电衬底，衬底上的一个或多个导电焊盘，以及用于将焊盘耦合到子系统电路的电引线。 两个相邻的焊盘，每个来自不同的子系统，形成电容耦合器以在子系统之间传送信号。 焊盘由具有大介电常数的低损耗介电材料覆盖以改善信号传输。 可以使用两个电容耦合器来分别承载差分信号的正和负信号来支持差分信号。 子系统出现故障时可能会更换或保留在原位。 可能会向系统添加其他子系统以扩展其容量。

公开(公告)号：US4117546A

公开(公告)日：1978-09-26

申请号：US865806

申请日：1977-12-30

申请人： Narasipur Gundappa Anantha ,  Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

发明人： Narasipur Gundappa Anantha ,  Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

IPC分类号： G11C11/56 ,  G11C19/28 ,  G11C27/04 ,  H01L27/10 ,  H01L27/105 ,  H03H11/26 ,  G11C11/40

CPC分类号： H01L27/1057 ,  G11C19/287

摘要： Disclosed is an interlaced serial-parallel-serial (SPS) charge coupled device (CCD) memory with improved clocking. By performing the interlacing as well as the serial-parallel-serial function with only seven clock pulses, less metallurgy and consequently less space per bit on a semiconductor chip is required. By reducing the number of clock requirements, the supporting logic circuitry is simplified permitting a larger portion of the semiconductor chip area to be used for data bit storage.

公开(公告)号：US4099175A

公开(公告)日：1978-07-04

申请号：US736970

申请日：1976-10-29

申请人： Barry Jay Rubin

发明人： Barry Jay Rubin

IPC分类号： H03M1/66 ,  H01L21/339 ,  H01L29/762 ,  H01L29/768 ,  H03M1/00 ,  H03K13/02

CPC分类号： H01L29/76833 ,  H03M1/804

摘要： A serial digital-to-analog converter using charge-coupled device technology. The converter comprises, in tandem, an input charge source diffusion, an input charge storage gate, a pair of charge splitting gates and an output charge collecting diffusion. The diffusions and the charge storage and the charge splitting gates are separated from each other by respective control gates.

摘要翻译： 一种使用电荷耦合器件技术的串行数模转换器。 该转换器一起包括输入电荷源扩散，输入电荷存储栅极，一对电荷分离栅极和输出电荷收集扩散。 扩散和电荷存储和电荷分离栅极通过相应的控制栅极彼此分离。