公开(公告)号：US08804059B2

公开(公告)日：2014-08-12

申请号：US13025178

申请日：2011-02-11

申请人： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

发明人： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

IPC分类号： G02F1/1343 ,  H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L27/14 ,  H01L29/15 ,  H01L31/036

CPC分类号： G02F1/136213

摘要： A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.

摘要翻译： 提供了包括扫描线，数据线，有源器件，像素电极，电容器电极线，半导体图案层和至少一个电介质层的像素结构。 有源器件电连接到扫描线和数据线。 像素电极电连接到有源器件。 电容器电极线位于像素电极下方。 在电容器电极线和像素电极之间形成第一存储电容器。 半导体图案层设置在电容器电极线和像素电极之间，像素电极电连接到半导体图案层。 在半导体图案层和电容器电极线之间形成第二存储电容器。 电介质层配置在电容电极线与像素电极之间，位于半导电图案层与电容电极线之间。

公开(公告)号：US20120092605A1

公开(公告)日：2012-04-19

申请号：US13025178

申请日：2011-02-11

申请人： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

发明人： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213

摘要： A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.

摘要翻译： 提供了包括扫描线，数据线，有源器件，像素电极，电容器电极线，半导体图案层和至少一个电介质层的像素结构。 有源器件电连接到扫描线和数据线。 像素电极电连接到有源器件。 电容器电极线位于像素电极下方。 在电容器电极线和像素电极之间形成第一存储电容器。 半导体图案层设置在电容器电极线和像素电极之间，像素电极电连接到半导体图案层。 在半导体图案层和电容器电极线之间形成第二存储电容器。 电介质层配置在电容电极线与像素电极之间，位于半导电图案层与电容电极线之间。

公开(公告)号：US20120139043A1

公开(公告)日：2012-06-07

申请号：US12957406

申请日：2010-12-01

申请人： Wen-Shin Wu ,  Chun-Yao Huang ,  Hsin-Hua Lin

发明人： Wen-Shin Wu ,  Chun-Yao Huang ,  Hsin-Hua Lin

IPC分类号： H01L29/786

CPC分类号： H01L29/78621 ,  H01L29/7869

摘要： A thin film transistor includes a gate, a pair of electrodes, a first semiconductor layer disposed between the gate and the pair of electrodes, and a semiconductor stacked layer disposed between the first semiconductor layer and the pair of the electrodes. The semiconductor stacked layer includes a second semiconductor layer disposed adjacent to the pair of electrodes and at least one pair of semiconductor layers including a third semiconductor layer and a fourth semiconductor layer, the third semiconductor layer being sandwiched between the second semiconductor layer and the fourth semiconductor layer. In particular, the electric conductivity of the third semiconductor layer is substantially smaller than the electric conductivity of the second semiconductor layer and the electric conductivity of the fourth semiconductor layer.

摘要翻译： 薄膜晶体管包括栅极，一对电极，设置在栅极和一对电极之间的第一半导体层，以及设置在第一半导体层和一对电极之间的半导体层叠层。 半导体堆叠层包括邻近该对电极设置的第二半导体层和包括第三半导体层和第四半导体层的至少一对半导体层，第三半导体层夹在第二半导体层和第四半导体层之间 层。 特别地，第三半导体层的导电率显着小于第二半导体层的导电率和第四半导体层的导电率。

公开(公告)号：US08405085B2

公开(公告)日：2013-03-26

申请号：US12957406

申请日：2010-12-01

申请人： Wen-Shin Wu ,  Chun-Yao Huang ,  Hsin-Hua Lin

发明人： Wen-Shin Wu ,  Chun-Yao Huang ,  Hsin-Hua Lin

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC分类号： H01L29/78621 ,  H01L29/7869

摘要： A thin film transistor includes a gate, a pair of electrodes, a first semiconductor layer disposed between the gate and the pair of electrodes, and a semiconductor stacked layer disposed between the first semiconductor layer and the pair of the electrodes. The semiconductor stacked layer includes a second semiconductor layer disposed adjacent to the pair of electrodes and at least one pair of semiconductor layers including a third semiconductor layer and a fourth semiconductor layer, the third semiconductor layer being sandwiched between the second semiconductor layer and the fourth semiconductor layer. In particular, the electric conductivity of the third semiconductor layer is substantially smaller than the electric conductivity of the second semiconductor layer and the electric conductivity of the fourth semiconductor layer.

摘要翻译： 薄膜晶体管包括栅极，一对电极，设置在栅极和一对电极之间的第一半导体层，以及设置在第一半导体层和一对电极之间的半导体层叠层。 半导体堆叠层包括邻近该对电极设置的第二半导体层和包括第三半导体层和第四半导体层的至少一对半导体层，第三半导体层夹在第二半导体层和第四半导体层之间 层。 特别地，第三半导体层的导电率显着小于第二半导体层的导电率和第四半导体层的导电率。

公开(公告)号：US08988624B2

公开(公告)日：2015-03-24

申请号：US13243317

申请日：2011-09-23

申请人： Chun-Yao Huang ,  Young Bae Park ,  Shih Chang Chang

发明人： Chun-Yao Huang ,  Young Bae Park ,  Shih Chang Chang

IPC分类号： G02F1/136 ,  G02F1/1362 ,  H01L29/786 ,  H01L27/12

CPC分类号： G02F1/1362 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/1225 ,  H01L29/7869

摘要： Disclosed embodiments relate to a thin-film transistor (TFT) for use in a display device. The display device may include a liquid crystal display (LCD) panel having multiple pixels arranged in rows and column, with each row corresponding to a gate line and each column corresponding to a source line. Each of the pixels includes a pixel electrode and a TFT. The TFT may include a metal oxide semiconductor channel between a source and drain. For each TFT, holes may be formed in the gate line in a region beneath the source and/or the drain. The holes may be formed such that the source and drain only partially overlap the holes. The presence of the holes reduces the area of the gate line, which may reduce parasitic capacitance and improve loading. This may provide improved panel performance, which may reduce the appearance of certain visual artifacts.

摘要翻译： 公开的实施例涉及用于显示装置的薄膜晶体管（TFT）。 显示装置可以包括具有排列成行和列的多个像素的液晶显示器（LCD）面板，每行对应于栅极线，每列对应于源极线。 每个像素包括像素电极和TFT。 TFT可以在源极和漏极之间包括金属氧化物半导体沟道。 对于每个TFT，可以在源极和/或漏极下方的区域中的栅极线中形成空穴。 孔可以形成为使得源极和漏极仅部分地与孔重叠。 孔的存在减小了栅极线的面积，这可能减少寄生电容并改善负载。 这可以提供改进的面板性能，这可以减少某些视觉伪影的外观。

公开(公告)号：US08304778B2

公开(公告)日：2012-11-06

申请号：US13180555

申请日：2011-07-12

申请人： Chen-Yi Wu ,  Yih-Chyun Kao ,  Chun-Yao Huang

发明人： Chen-Yi Wu ,  Yih-Chyun Kao ,  Chun-Yao Huang

IPC分类号： H01L31/00

CPC分类号： H01L29/41733 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor (TFT) and a pixel structure having the TFT are provided. The TFT is configured on a substrate. Besides, the TFT includes a gate, a gate insulation layer, a source, a channel layer, and a drain. The gate insulation layer covers the gate and the substrate. The source is configured on a portion of the gate insulation layer. The channel layer is configured on the gate insulation layer and covers a portion of the source located above the gate. The drain is configured on and electrically connected to the channel layer.

摘要翻译： 提供薄膜晶体管（TFT）和具有TFT的像素结构。 TFT被配置在基板上。 此外，TFT包括栅极，栅极绝缘层，源极，沟道层和漏极。 栅极绝缘层覆盖栅极和基板。 源极配置在栅极绝缘层的一部分上。 沟道层配置在栅极绝缘层上并覆盖位于栅极上方的源极的一部分。 漏极配置在沟道层上并电连接到沟道层。

公开(公告)号：US20110042777A1

公开(公告)日：2011-02-24

申请号：US12542721

申请日：2009-08-18

申请人： You-Di Jhang ,  Chun-Yao Huang ,  Kuo-Hua Ho

发明人： You-Di Jhang ,  Chun-Yao Huang ,  Kuo-Hua Ho

IPC分类号： H01L29/06

CPC分类号： H01L21/76232

摘要： A deep trench isolation structure including a deep trench disposed within a substrate to surround an active area on the substrate and a dielectric material filled within the deep trench. The deep trench comprises at least a corner in an arc shape layout or in a polygonal line shape layout. Accordingly, the deep trench isolation structure can be obtained in a better stress condition and with less process time for trench filling.

摘要翻译： 深沟槽隔离结构，其包括设置在衬底内的深沟槽，以围绕衬底上的有源区域和填充在深沟槽内的电介质材料。 深沟槽至少包括弧形布局或折线形布置的角部。 因此，可以在更好的应力条件下获得深沟槽隔离结构，并且沟槽填充的处理时间较短。

公开(公告)号：US07508902B2

公开(公告)日：2009-03-24

申请号：US11458098

申请日：2006-07-17

申请人： Cheng-Hung Tsai ,  Chun-Yao Huang ,  Yi-Feng Liao

发明人： Cheng-Hung Tsai ,  Chun-Yao Huang ,  Yi-Feng Liao

IPC分类号： G11C21/00

CPC分类号： G11C19/00

摘要： A shift register including a plurality of stage circuits is provided. Each of the stage circuits has a shift circuit for receiving an input signal and providing an output signal. The output signal is obtained through the logic calculation and delaying of the input signal. Each of the stage circuits, except the first one, further includes a logic circuit used to produce at least one control signal according to the internal signals of the containing stage circuit, so as to replace at least one of the required clock signals during the operation of the corresponding shift circuit.

摘要翻译： 提供了包括多个级电路的移位寄存器。 每个级电路具有用于接收输入信号并提供输出信号的移位电路。 通过输入信号的逻辑计算和延迟获得输出信号。 除了第一级之外，每个级电路还包括用于根据容纳级电路的内部信号产生至少一个控制信号的逻辑电路，以便在操作期间替换所需的时钟信号中的至少一个 的相应移位电路。

公开(公告)号：US20140049721A1

公开(公告)日：2014-02-20

申请号：US13585471

申请日：2012-08-14

申请人： Chun-Yao Huang ,  Young-Bae Park ,  Shih-Chang Chang ,  Szu-Hsien Lee

发明人： Chun-Yao Huang ,  Young-Bae Park ,  Shih-Chang Chang ,  Szu-Hsien Lee

IPC分类号： G02F1/1362

CPC分类号： G02F1/136204 ,  G02F1/133512 ,  G02F2001/133388 ,  G02F2001/136218

摘要： An electronic device may have a display such as a liquid crystal display. The display may have a color filter layer and a thin-film transistor layer. An opaque masking layer may be formed on the color filter layer. An active portion of the display may contain an array of display pixels that are controlled by control signals that are provided over intersecting gate lines and data lines. In an inactive portion of the display, gate driver circuits may be used to generate gate line signals for the gate lines. Portions of the gate lines in the gate driver circuitry, power supply lines, and common electrode lines may be formed on the thin-film-transistor layer. These lines may be electromagnetically shielded using indium tin oxide shielding layers to prevent electric fields from inducing charge in the opaque masking layer and thereby causing color artifacts.

摘要翻译： 电子设备可以具有诸如液晶显示器的显示器。 显示器可以具有滤色器层和薄膜晶体管层。 不透明掩模层可以形成在滤色器层上。 显示器的有效部分可以包含由在相交的栅极线和数据线上提供的控制信号控制的显示像素阵列。 在显示器的非活动部分中，栅极驱动器电路可用于产生栅极线的栅极线信号。 栅极驱动器电路，电源线和公共电极线中的栅极线的一些部分可以形成在薄膜晶体管层上。 这些线可以使用氧化铟锡屏蔽层进行电磁屏蔽，以防止电场在不透明掩模层中引起电荷，从而导致颜色伪影。

公开(公告)号：US08643833B1

公开(公告)日：2014-02-04

申请号：US13600726

申请日：2012-08-31

申请人： Min-Wei Hung ,  Hsin-Yi Tsai ,  Kuo-Cheng Huang ,  Chun-Yao Huang

发明人： Min-Wei Hung ,  Hsin-Yi Tsai ,  Kuo-Cheng Huang ,  Chun-Yao Huang

IPC分类号： G01N21/00

CPC分类号： G01N21/9501

摘要： An inspection system and method for inspecting the surface defects of the specimen is provided. The inspection system includes a laser focus module, a microscope objective module, an image pick-up module, and a process module. The laser focus module configured to emit laser beam on the specimen by a predetermined angle relative to a surface of the specimen, and to generate scattered light and reflected light when the laser beam irradiates on the surface defects of the specimen. The process module can calculate the real size of the defects by using the intensity information obtained from the image pick-up module and the microscope objective module or using the diameter information obtained from the reflected light image while the reflected light projects on a screen.

摘要翻译： 提供了一种用于检查样品表面缺陷的检查系统和方法。 检查系统包括激光聚焦模块，显微镜物镜模块，图像拾取模块和处理模块。 所述激光聚焦模块被配置为相对于所述检体的表面在所述试样上发射预定角度的激光束，并且当所述激光束照射在所述试样的表面缺陷上时产生散射光和反射光。 处理模块可以通过使用从图像拾取模块和显微镜物镜模块获得的强度信息或使用从反射光图像获得的直径信息来计算缺陷的实际大小，同时反射光投射在屏幕上。