公开(公告)号：US08445075B2

公开(公告)日：2013-05-21

申请号：US12975833

申请日：2010-12-22

申请人： Huiwen Xu ,  Mei-Yee Shek ,  Li-Qun Xia ,  Amir Al-Bayati ,  Derek Witty ,  Hichem M'Saad

发明人： Huiwen Xu ,  Mei-Yee Shek ,  Li-Qun Xia ,  Amir Al-Bayati ,  Derek Witty ,  Hichem M'Saad

IPC分类号： B05D3/10

CPC分类号： C23C16/308 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3122 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834

摘要： Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed from the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.

摘要翻译： 提供了在基板上处理膜的方法。 在一个方面，所述方法包括在通过在膜上沉积包含硅，碳和任选的氧和/或氮的薄层来从膜去除光致抗蚀剂之后处理图案化的低介电常数膜。 薄层为图案化的低介电常数膜提供了富含碳的疏水性表面。 薄层还保护低介电常数膜免于随后的湿法清洗工艺和前体渗透，随后沉积在低介电常数膜上。

公开(公告)号：US20070287301A1

公开(公告)日：2007-12-13

申请号：US11694856

申请日：2007-03-30

申请人： Huiwen Xu ,  Mei-Yee Shek ,  Li-Qun Xia ,  Amir Al-Bayati ,  Derek Witty ,  Hichem M'Saad

发明人： Huiwen Xu ,  Mei-Yee Shek ,  Li-Qun Xia ,  Amir Al-Bayati ,  Derek Witty ,  Hichem M'Saad

IPC分类号： H01L21/312

CPC分类号： C23C16/308 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3122 ,  H01L21/31612 ,  H01L21/31633 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834

摘要： Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed form the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.

摘要翻译： 提供了在基板上处理膜的方法。 在一个方面，所述方法包括在通过在膜上沉积包含硅，碳和任选的氧和/或氮的薄层，在从膜去除光致抗蚀剂之后处理图案化的低介电常数膜。 薄层为图案化的低介电常数膜提供了富含碳的疏水性表面。 薄层还保护低介电常数膜免于随后的湿法清洗工艺和前体渗透，随后沉积在低介电常数膜上。

公开(公告)号：US20070202640A1

公开(公告)日：2007-08-30

申请号：US11365740

申请日：2006-02-28

申请人： Amir Al-Bayati ,  Reza Arghavani ,  Mei-Yee Shek ,  Li-Qun Xia ,  Mihaela Balseanu ,  Bok Kim ,  Michael Cox ,  Chad Peterson ,  Hichem M'Saad

发明人： Amir Al-Bayati ,  Reza Arghavani ,  Mei-Yee Shek ,  Li-Qun Xia ,  Mihaela Balseanu ,  Bok Kim ,  Michael Cox ,  Chad Peterson ,  Hichem M'Saad

IPC分类号： H01L21/338

CPC分类号： H01L29/4983 ,  H01L21/02115 ,  H01L21/02126 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02362 ,  H01L21/26586 ,  H01L21/3146 ,  H01L21/31633 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/7843

摘要： A method of forming source and drain regions in a semiconductor transistor. The method includes the steps of forming a first sidewall spacer on sidewall surfaces of a gate electrode that is formed on an underlying substrate, where the first sidewall spacer includes amorphous carbon. The method may also include implanting the source and drain regions in the semiconductor substrate, and removing the first sidewall spacer before annealing the source and drain regions. The method may still further include forming a second sidewall spacer on the sidewall surfaces of the gate electrode, where the second sidewall spacer has a k-value less than 4. Also, a method to enhance conformality of a sidewall spacer layer. The method may include the steps of pulsing a radio-frequency power source to generate periodically a plasma, and depositing the plasma on sidewall surfaces of a gate electrode to form the sidewall spacer layer.

摘要翻译： 一种在半导体晶体管中形成源区和漏区的方法。 该方法包括以下步骤：在形成在下面的基底上的栅电极的侧壁表面上形成第一侧壁间隔物，其中第一侧壁间隔物包括无定形碳。 该方法还可以包括将源极和漏极区域注入到半导体衬底中，以及在退火源极和漏极区域之前去除第一侧壁间隔物。 该方法还可以包括在栅电极的侧壁表面上形成第二侧壁间隔物，其中第二侧壁间隔物的k值小于4.另外，增强侧壁间隔层的一致性的方法。 该方法可以包括以下步骤：脉冲射频电源周期性地产生等离子体，以及将等离子体沉积在栅电极的侧壁表面上以形成侧壁间隔层。

公开(公告)号：US20060270217A1

公开(公告)日：2006-11-30

申请号：US11398436

申请日：2006-04-05

申请人： Mihaela Balseanu ,  Jia Lee ,  Mei-Yee Shek ,  Amir Al-Bayati ,  Li-Qun Xia ,  Hichem M'Saad

发明人： Mihaela Balseanu ,  Jia Lee ,  Mei-Yee Shek ,  Amir Al-Bayati ,  Li-Qun Xia ,  Hichem M'Saad

IPC分类号： H01L21/44

CPC分类号： H01L29/7843 ,  C23C16/345 ,  C23C16/56 ,  H01L21/28044 ,  H01L21/823807 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/4925 ,  H01L29/66545 ,  H01L29/66583

摘要： A process flow integration scheme employs one or more techniques to control stress in a semiconductor device formed thereby. In accordance with one embodiment, cumulative stress contributed by RTP of a nitride spacer and polysilicon gate, and subsequent deposition of a high stress etch stop layer, enhance strain and improve device performance. Germanium may be deposited or implanted into the gate structure in order to facilitate stress control.

公开(公告)号：US07566655B2

公开(公告)日：2009-07-28

申请号：US11398436

申请日：2006-04-05

申请人： Mihaela Balseanu ,  Jia Lee ,  Mei-Yee Shek ,  Amir Al-Bayati ,  Li-Qun Xia ,  Hichem M'Saad

发明人： Mihaela Balseanu ,  Jia Lee ,  Mei-Yee Shek ,  Amir Al-Bayati ,  Li-Qun Xia ,  Hichem M'Saad

IPC分类号： H01L21/44

CPC分类号： H01L29/7843 ,  C23C16/345 ,  C23C16/56 ,  H01L21/28044 ,  H01L21/823807 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/4925 ,  H01L29/66545 ,  H01L29/66583

摘要： A process flow integration scheme employs one or more techniques to control stress in a semiconductor device formed thereby. In accordance with one embodiment, cumulative stress contributed by RTP of a nitride spacer and polysilicon gate, and subsequent deposition of a high stress etch stop layer, enhance strain and improve device performance. Germanium may be deposited or implanted into the gate structure in order to facilitate stress control.

摘要翻译： 工艺流程集成方案采用一种或多种技术来控制由此形成的半导体器件中的应力。 根据一个实施例，由氮化物间隔物和多晶硅栅极的RTP贡献的累积应力以及随后沉积高应力蚀刻停止层，增强应变并提高器件性能。 可以将锗沉积或植入栅极结构中以便于应力控制。

公开(公告)号：US20080020591A1

公开(公告)日：2008-01-24

申请号：US11762590

申请日：2007-06-13

申请人： Mihaela Balseanu ,  Victor Nguyen ,  Li-Qun Xia ,  Derek Witty ,  Hichem M'Saad ,  Mei-Yee Shek ,  Isabelita Roflox

发明人： Mihaela Balseanu ,  Victor Nguyen ,  Li-Qun Xia ,  Derek Witty ,  Hichem M'Saad ,  Mei-Yee Shek ,  Isabelita Roflox

IPC分类号： H01L21/31

CPC分类号： H01L21/3105 ,  C23C16/345 ,  C23C16/56 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3185 ,  H01L21/823807 ,  H01L29/66583 ,  H01L29/7843

摘要： Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.

摘要翻译： 氮化硅层的应力可以通过在较高温度下沉积来增强。 使用允许将衬底加热到​​基本上大于400℃的装置（例如由陶瓷而不是铝制成的加热器），沉积的氮化硅膜可能表现出增强的应力，从而可以改善下面的MOS晶体管的性能 设备。 根据替代实施例，沉积的氮化硅膜在升高的温度下暴露于紫外线（UV）辐射固化，从而有助于从膜中除去氢并增加膜应力。 根据其他实施例，使用采用多个沉积/固化周期的整合方法形成氮化硅膜，以保持薄膜在底层凸起特征的尖角处的完整性。 可以通过在每个循环中包括UV后固化等离子体处理来促进连续层之间的粘附。

公开(公告)号：US20060093756A1

公开(公告)日：2006-05-04

申请号：US10981430

申请日：2004-11-03

申请人： Nagarajan Rajagopalan ,  Li-Qun Xia ,  Mihaela Balseanu ,  Thomas Nowak ,  Ranjana Shah ,  Huiwen Xu ,  Chad Peterson ,  Derek Witty ,  Hichem M'Saad

发明人： Nagarajan Rajagopalan ,  Li-Qun Xia ,  Mihaela Balseanu ,  Thomas Nowak ,  Ranjana Shah ,  Huiwen Xu ,  Chad Peterson ,  Derek Witty ,  Hichem M'Saad

IPC分类号： B05D1/36

CPC分类号： C23C16/4405 ,  C23C16/4404 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02301 ,  H01L21/3121 ,  H01L21/31633

摘要： A method for seasoning a deposition chamber wherein the chamber components and walls are densely coated with a material that does not contain carbon prior to deposition of an organo-silicon material on a substrate. An optional carbon-containing layer may be deposited therebetween. A chamber cleaning method using low energy plasma and low pressure to remove residue from internal chamber surfaces is provided and may be combined with the seasoning process.

摘要翻译： 一种用于调节沉积室的方法，其中在将有机硅材料沉积在基底上之前，室部件和壁被不含碳的材料致密地涂覆。 可以在其间沉积任选的含碳层。 提供了使用低能量等离子体和低压以从内部室表面除去残余物的室清洁方法，并且可以与调味过程组合。

公开(公告)号：US20050250348A1

公开(公告)日：2005-11-10

申请号：US10840754

申请日：2004-05-06

申请人： Li-Qun Xia ,  Huiwen Xu ,  Derek Witty ,  Hichem M'Saad ,  Dustin Ho ,  Juan Rocha-Alvarez

发明人： Li-Qun Xia ,  Huiwen Xu ,  Derek Witty ,  Hichem M'Saad ,  Dustin Ho ,  Juan Rocha-Alvarez

IPC分类号： C23C16/40 ,  H01L21/31 ,  H01L21/316 ,  H01L21/469 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76826 ,  C23C16/401 ,  C23C16/45523 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02362 ,  H01L21/31633 ,  H01L21/76829

摘要： A method of processing a substrate including depositing a low dielectric constant film comprising silicon, carbon, and oxygen on the substrate and depositing an oxide rich cap on the low dielectric constant film is provided. The low dielectric constant film is deposited from a gas mixture comprising an organosilicon compound and an oxidizing gas in the presence of RF power in a chamber. The RF power and a flow of the organosilicon compound and the oxidizing gas are continued in the chamber after the deposition of the low dielectric constant film at flow rates sufficient to deposit an oxide rich cap on the low dielectric constant film.

摘要翻译： 提供一种处理衬底的方法，包括在衬底上沉积包含硅，碳和氧的低介电常数膜并在低介电常数膜上沉积氧化物富盖。 在室内存在RF功率的情况下，从包含有机硅化合物和氧化气体的气体混合物中沉积低介电常数膜。 在低介电常数薄膜以低于在低介电常数膜上沉积富含氧化物的盖子的流速下沉积后，室内继续进行RF功率和有机硅化合物和氧化气体的流动。

公开(公告)号：US08138104B2

公开(公告)日：2012-03-20

申请号：US11762590

申请日：2007-06-13

申请人： Mihaela Balseanu ,  Victor Nguyen ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad ,  Mei-Yee Shek ,  Isabelita Roflox

发明人： Mihaela Balseanu ,  Victor Nguyen ,  Li-Qun Xia ,  Derek R. Witty ,  Hichem M'Saad ,  Mei-Yee Shek ,  Isabelita Roflox

IPC分类号： H01L21/469

CPC分类号： H01L21/3105 ,  C23C16/345 ,  C23C16/56 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3185 ,  H01L21/823807 ,  H01L29/66583 ,  H01L29/7843

摘要： Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.

摘要翻译： 氮化硅层的应力可以通过在较高温度下沉积来增强。 使用允许将衬底加热到​​基本上大于400℃的装置（例如由陶瓷而不是铝制成的加热器），沉积的氮化硅膜可能表现出增强的应力，从而可以改善下面的MOS晶体管的性能 设备。 根据替代实施例，沉积的氮化硅膜在升高的温度下暴露于紫外线（UV）辐射固化，从而有助于从膜中除去氢并增加膜应力。 根据其他实施例，使用采用多个沉积/固化周期的整合方法形成氮化硅膜，以保持薄膜在底层凸起特征的尖角处的完整性。 可以通过在每个循环中包括UV后固化等离子体处理来促进连续层之间的粘附。

公开(公告)号：US20120196452A1

公开(公告)日：2012-08-02

申请号：US13365229

申请日：2012-02-02

申请人： Mihaela Balseanu ,  Michael S. Cox ,  Li-Qun Xia ,  Mei-Yee Shek ,  Jia Lee ,  Vladimir Zubkov ,  Tzu-Fang Huang ,  Rongping Wang ,  Isabelita Roflox ,  Hichem M'Saad

发明人： Mihaela Balseanu ,  Michael S. Cox ,  Li-Qun Xia ,  Mei-Yee Shek ,  Jia Lee ,  Vladimir Zubkov ,  Tzu-Fang Huang ,  Rongping Wang ,  Isabelita Roflox ,  Hichem M'Saad

IPC分类号： H01L21/318

CPC分类号： C23C16/345 ,  C23C16/45523 ,  C23C16/56 ,  H01L21/3141 ,  H01L21/3185 ,  H01L21/823412 ,  H01L21/82345 ,  H01L21/823807 ,  H01L21/823835

摘要： High tensile stress in a deposited layer, such as a silicon nitride layer, may be achieved utilizing one or more techniques employed either alone or in combination. In one embodiment, a silicon nitride film having high tensile stress may be formed by depositing the silicon nitride film in the presence of a porogen. The deposited silicon nitride film may be exposed to at least one treatment selected from a plasma or ultraviolet radiation to liberate the porogen. The silicon nitride film may be densified such that a pore resulting from liberation of the porogen is reduced in size, and Si—N bonds in the silicon nitride film are strained to impart a tensile stress in the silicon nitride film. In another embodiment, tensile stress in a silicon nitride film may be enhanced by depositing a silicon nitride film in the presence of a nitrogen-containing plasma at a temperature of less than about 400° C., and exposing the deposited silicon nitride film to ultraviolet radiation.

摘要翻译： 沉积层（例如氮化硅层）中的高拉伸应力可以利用单独使用或组合使用的一种或多种技术来实现。 在一个实施例中，可以通过在致孔剂的存在下沉积氮化硅膜来形成具有高拉伸应力的氮化硅膜。 沉积的氮化硅膜可以暴露于选自等离子体或紫外线辐射的至少一种处理以释放致孔剂。 可以使氮化硅膜致密化，使致孔剂释放产生的孔尺寸减小，并且氮化硅膜中的Si-N键变形以在氮化硅膜中产生拉伸应力。 在另一个实施例中，可以通过在低于约400℃的温度下在含氮等离子体的存在下沉积氮化硅膜来增强氮化硅膜中的拉伸应力，并将沉积的氮化硅膜暴露于紫外线 辐射。