Method of manufacturing a field-effect transistor
    3.
    发明授权
    Method of manufacturing a field-effect transistor 有权
    制造场效应晶体管的方法

    公开(公告)号:US08586462B2

    公开(公告)日:2013-11-19

    申请号:US13307069

    申请日:2011-11-30

    IPC分类号: H01L29/808 H01L21/283

    摘要: Disclosed are a method of manufacturing a field-effect transistor. The disclosed method includes: providing a semiconductor substrate; forming a source ohmic metal layer on one side of the semiconductor substrate; forming a drain ohmic metal layer on another side of the semiconductor substrate; forming a gate electrode between the source ohmic metal layer and the drain ohmic metal layer, on an upper portion of the semiconductor substrate; forming an insulating film on the semiconductor substrate's upper portion including the source ohmic metal layer, the drain ohmic metal layer and the gate electrode; and forming a plurality of field electrodes on an upper portion of the insulating film, wherein the insulating film below the respective field electrodes has different thicknesses.

    摘要翻译: 公开了一种制造场效晶体管的方法。 所公开的方法包括:提供半导体衬底; 在半导体衬底的一侧上形成源极欧姆金属层; 在所述半导体衬底的另一侧上形成漏极欧姆金属层; 在所述源欧姆金属层和所述漏极欧姆金属层之间形成栅电极,在所述半导体衬底的上部; 在包括源欧姆金属层,漏极欧姆金属层和栅电极的半导体衬底的上部上形成绝缘膜; 以及在绝缘膜的上部形成多个场电极,其中各个场电极下方的绝缘膜具有不同的厚度。

    FIELD-EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF
    4.
    发明申请
    FIELD-EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF 有权
    场效应晶体管及其制造方法

    公开(公告)号:US20120153361A1

    公开(公告)日:2012-06-21

    申请号:US13307069

    申请日:2011-11-30

    IPC分类号: H01L21/283 H01L29/808

    摘要: Disclosed are a field-effect transistor and a manufacturing method thereof. The disclosed field-effect transistor includes: a semiconductor substrate; a source ohmic metal layer formed on one side of the semiconductor substrate; a drain ohmic metal layer formed on another side of the semiconductor substrate; a gate electrode formed between the source ohmic metal layer and the drain ohmic metal layer, on an upper portion of the semiconductor substrate; an insulating film formed on the semiconductor substrate's upper portion including the source ohmic metal layer, the drain ohmic metal layer and the gate electrode; and a plurality of field electrodes formed on an upper portion of the insulating film, wherein the insulating film below the respective field electrodes has different thicknesses.

    摘要翻译: 公开了场效应晶体管及其制造方法。 所公开的场效应晶体管包括:半导体衬底; 源极欧姆金属层,形成在半导体衬底的一侧上; 形成在所述半导体衬底的另一侧上的漏极欧姆金属层; 在所述源极欧姆金属层和所述漏极欧姆金属层之间形成的栅电极,位于所述半导体衬底的上部; 形成在包括源极欧姆金属层,漏极欧姆金属层和栅电极的半导体衬底的上部上的绝缘膜; 以及形成在绝缘膜的上部的多个场电极,其中,各个场电极下方的绝缘膜具有不同的厚度。

    POWER AMPLIFIER DEVICE
    5.
    发明申请
    POWER AMPLIFIER DEVICE 有权
    功率放大器器件

    公开(公告)号:US20110133843A1

    公开(公告)日:2011-06-09

    申请号:US12960153

    申请日:2010-12-03

    IPC分类号: H03F3/68

    摘要: Provided is a power amplifier device. The power amplifier device includes: a cutoff unit cutting off a direct current (DC) component of a signal delivered from a signal input terminal; a circuit protecting unit connected to the cutoff unit and stabilizing a signal delivered from the cutoff unit; and an amplification unit connected to the circuit protecting unit and amplifying a signal delivered from the circuit protecting unit, wherein the amplification unit comprises a plurality of transistors connected in parallel to the circuit protecting unit and the circuit protecting unit comprises resistors connected to between bases of the plurality of transistors.

    摘要翻译: 提供了一种功率放大器装置。 功率放大器装置包括:切断单元,切断从信号输入端子发送的信号的直流(DC)分量; 连接到所述切断单元的电路保护单元,并且稳定从所述切断单元传送的信号; 以及放大单元,连接到所述电路保护单元并放大从所述电路保护单元传递的信号,其中所述放大单元包括与所述电路保护单元并联连接的多个晶体管,所述电路保护单元包括电阻器, 多个晶体管。

    INDUCTOR
    6.
    发明申请
    INDUCTOR 有权
    电感器

    公开(公告)号:US20110140825A1

    公开(公告)日:2011-06-16

    申请号:US12968022

    申请日:2010-12-14

    IPC分类号: H01F27/30

    摘要: Provided is an inductor. The inductor includes a first to a fourth conductive terminals formed in one direction within a semiconductor substrate, a first conductive line formed on one side of the semiconductor substrate and electrically connected to the second and third conductive terminals interiorly positioned among the first to fourth conductive terminals, a second conductive line formed on the one side of the semiconductor substrate and electrically connected to the first and fourth conductive terminals exteriorly positioned among the first to fourth conductive terminals, and a third conductive line formed on the other side of the semiconductor substrate and electrically connected to the first and third conductive terminals among the first to fourth conductive terminals.

    摘要翻译: 提供一种电感器。 电感器包括在半导体衬底内的一个方向上形成的第一至第四导电端子,形成在半导体衬底的一侧上的第一导电线,并且电连接到内部位于第一至第四导电端子之间的第二和第三导电端子 形成在所述半导体衬底的一侧上并与外部位于所述第一至第四导电端子之间的所述第一和第四导电端子电连接的第二导电线,以及形成在所述半导体衬底的另一侧上并电连接的第三导电线 连接到第一至第四导电端子中的第一和第三导电端子。

    Power amplifier device
    7.
    发明授权
    Power amplifier device 有权
    功率放大器装置

    公开(公告)号:US08130041B2

    公开(公告)日:2012-03-06

    申请号:US12960153

    申请日:2010-12-03

    IPC分类号: H03F3/68

    摘要: Provided is a power amplifier device. The power amplifier device includes: a cutoff unit cutting off a direct current (DC) component of a signal delivered from a signal input terminal; a circuit protecting unit connected to the cutoff unit and stabilizing a signal delivered from the cutoff unit; and an amplification unit connected to the circuit protecting unit and amplifying a signal delivered from the circuit protecting unit, wherein the amplification unit comprises a plurality of transistors connected in parallel to the circuit protecting unit and the circuit protecting unit comprises resistors connected to between bases of the plurality of transistors.

    摘要翻译: 提供了一种功率放大器装置。 功率放大器装置包括:切断单元,切断从信号输入端子发送的信号的直流(DC)分量; 连接到所述切断单元的电路保护单元,并且稳定从所述切断单元传送的信号; 以及放大单元,连接到所述电路保护单元并放大从所述电路保护单元传送的信号,其中所述放大单元包括与所述电路保护单元并联连接的多个晶体管,所述电路保护单元包括电阻器, 多个晶体管。

    Inductor
    8.
    发明授权
    Inductor 有权
    电感器

    公开(公告)号:US07986211B2

    公开(公告)日:2011-07-26

    申请号:US12968022

    申请日:2010-12-14

    IPC分类号: H01F5/00

    摘要: Provided is an inductor. The inductor includes a first to a fourth conductive terminals formed in one direction within a semiconductor substrate, a first conductive line formed on one side of the semiconductor substrate and electrically connected to the second and third conductive terminals interiorly positioned among the first to fourth conductive terminals, a second conductive line formed on the one side of the semiconductor substrate and electrically connected to the first and fourth conductive terminals exteriorly positioned among the first to fourth conductive terminals, and a third conductive line formed on the other side of the semiconductor substrate and electrically connected to the first and third conductive terminals among the first to fourth conductive terminals.

    摘要翻译: 提供一种电感器。 电感器包括在半导体衬底内的一个方向上形成的第一至第四导电端子,形成在半导体衬底的一侧上的第一导电线,并且电连接到内部位于第一至第四导电端子之间的第二和第三导电端子 形成在所述半导体衬底的一侧上并与外部位于所述第一至第四导电端子之间的所述第一和第四导电端子电连接的第二导电线,以及形成在所述半导体衬底的另一侧上并电连接的第三导电线 连接到第一至第四导电端子中的第一和第三导电端子。

    Monolithic microwave integrated circuit device and method of forming the same
    10.
    发明授权
    Monolithic microwave integrated circuit device and method of forming the same 失效
    单片微波集成电路器件及其形成方法

    公开(公告)号:US08124489B2

    公开(公告)日:2012-02-28

    申请号:US12832432

    申请日:2010-07-08

    IPC分类号: H01L21/331

    摘要: Provided are a monolithic microwave integrated circuit device and a method for forming the same. The method includes: forming an sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer on a Heterojunction Bipolar Transistor (HBT) region and a PIN diode region of a substrate; forming an emitter pattern and an emitter cap pattern in the HBT region and exposing the base layer by patterning the emitter layer and the emitter cap layer; and forming an intrinsic region by doping a portion of the collector layer of the PIN diode region with a first type impurity, the PIN diode region being spaced apart from the HBT region.

    摘要翻译: 提供了一种单片微波集成电路器件及其形成方法。 该方法包括:在基底的异质结双极晶体管(HBT)区域和PIN二极管区域上形成子集电极层,集电极层,基极层,发射极层和发射极盖层; 在HBT区域中形成发射极图案和发射极盖图案,并通过图案化发射极层和发射极盖层而使基底层曝光; 并且通过用第一类型杂质掺杂PIN二极管区域的集电极层的一部分来形成本征区域,PIN二极管区域与HBT区域间隔开。