-
公开(公告)号：US10950958B2
公开(公告)日：2021-03-16
申请号：US16021269
申请日：2018-06-28
申请人： Intel Corporation
发明人： Phil Geng , Xiang Li , Mani Prakash , George Vergis
IPC分类号： H01R13/62 , H01R13/64 , H01R13/627 , H01R12/70 , H05K1/14 , H01R12/73 , H05K3/36 , H01R12/72 , H05K1/11
摘要： A memory module connector includes a memory module receiving slot configured to receive a memory module. The memory module connector further includes a restraining mechanism configured to release the memory module if a force applied by the memory module to the restraining mechanism is above a pre-determined force threshold.
-
公开(公告)号：US10141241B2
公开(公告)日：2018-11-27
申请号：US14767843
申请日：2014-09-27
申请人： INTEL CORPORATION
发明人： Jeffory L. Smalley , Susan F. Smith , Mani Prakash , Tao Liu , Henry C. Bosak , Harvey R. Kofstad , Almanzo T. Ortiz
IPC分类号： H01L23/367 , H01L23/40 , H01L23/433 , H01L25/065
摘要： An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.
-
公开(公告)号：US10790603B2
公开(公告)日：2020-09-29
申请号：US16264944
申请日：2019-02-01
申请人： Intel Corporation
发明人： Phil Geng , Xiang Li , George Vergis , Mani Prakash
摘要： An embodiment of a connector housing for a circuit board may include a connector body to receive the circuit board, and a relaxation mechanism mechanically coupled to the connector body to relax stress on the connector housing and maintain the circuit board received in the connector body under a load which exceeds a load threshold. Other embodiments are disclosed and claimed.
-
公开(公告)号：US20190044262A1
公开(公告)日：2019-02-07
申请号：US16021269
申请日：2018-06-28
申请人： Intel Corporation
发明人： Phil Geng , Xiang Li , Mani Prakash , George Vergis
摘要： A memory module connector includes a memory module receiving slot configured to receive a memory module. The memory module connector further includes a restraining mechanism configured to release the memory module if a force applied by the memory module to the restraining mechanism is above a pre-determined force threshold.
-
公开(公告)号：US09935033B2
公开(公告)日：2018-04-03
申请号：US14918119
申请日：2015-10-20
申请人： Intel Corporation
发明人： Susan F. Smith , Jeffory L. Smalley , Mani Prakash , Thu Huynh
IPC分类号： H01L23/00 , H01L23/367 , H01L25/00 , H01L25/065 , H01L23/427 , H01L21/48 , H01L23/40
CPC分类号： H01L23/3672 , H01L21/4882 , H01L23/40 , H01L23/4006 , H01L23/427 , H01L25/065 , H01L25/50 , H01L2023/4037 , H01L2023/4056 , H01L2023/4068 , H01L2924/0002 , H01L2924/00
摘要： An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second heat exchanger disposed in the opening on the at least one secondary device; at least one heat pipe coupled to the first heat exchanger and the second heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including a first portion, a second portion and at least one heat pipe coupled to the first portion and the second portion; and coupling the heat exchanger to the multi-chip package.
-
公开(公告)号：US20180007791A1
公开(公告)日：2018-01-04
申请号：US15702709
申请日：2017-09-12
申请人： Intel Corporation
发明人： Mani Prakash , Thomas T. Holden , Jeffory L. Smalley , Ram S. Viswanath , Bassam N. Coury , Dimitrios Ziakas , Chong J. Zhao , Jonathan W. Thibado , Gregorio R. Murtagian , Kuang C. Liu , Rajasekaran Swaminathan , Zhichao Zhang , John M. Lynch , David J. Llapitan , Sanka Ganesan , Xiang Li , George Vergis
IPC分类号： H05K1/18 , H01L23/00 , H01L23/498 , H01R12/71 , H01R12/79
CPC分类号： H05K1/181 , H01L23/00 , H01L23/498 , H01L2224/16225 , H01L2924/15311 , H01R12/712 , H01R12/79 , H05K2201/10159 , H05K2201/10325 , Y02P70/611
摘要： Configurable central processing unit (CPU) package substrates are disclosed. A package substrate is described that includes a processing device interface. The package substrate also includes a memory device electrical interface disposed on the package substrate. The package substrate also includes a removable memory mechanical interface disposed proximately to the memory device electrical interface. The removable memory mechanical interface is to allow a memory device to be easily removed from the package substrate after attachment of the memory device to the package substrate.
-
公开(公告)号：US20160183375A1
公开(公告)日：2016-06-23
申请号：US14578037
申请日：2014-12-19
申请人： Intel Corporation
发明人： Vijaykumar Krithivasan , Jeffory L. Smalley , David J. Llapitan , Gaurav Chawla , Mani Prakash , Susan F. Smith
IPC分类号： H05K1/18 , H01L23/40 , H01L23/498 , B23P15/26 , H01L21/48 , H05K3/32 , H05K7/20 , H01L23/367 , H01L21/50
CPC分类号： H05K7/2039 , H01L23/32 , H01L23/36 , H01L23/40 , H01L2924/0002 , H05K2201/10378 , H05K2201/1056 , H01L2924/00
摘要： Embodiments of the present disclosure are directed towards a socket loading element and associated techniques and configurations. In one embodiment, an apparatus may include a loading element configured to transfer a compressive load from a heat spreader to a socket assembly, wherein the loading element is configured to form a perimeter around a die when the loading element is coupled with an interposer disposed between the die and the socket assembly and wherein the loading element includes an opening configured to accommodate the die. Other embodiments may be described and/or claimed.
摘要翻译： 本公开的实施例针对套接字加载元件和相关联的技术和配置。 在一个实施例中，设备可以包括加载元件，该加载元件被配置为将压缩负载从散热器传送到插座组件，其中所述加载元件构造成当所述加载元件与设置在 模具和插座组件，并且其中装载元件包括构造成容纳模具的开口。 可以描述和/或要求保护其他实施例。
-
公开(公告)号：US20190165503A1
公开(公告)日：2019-05-30
申请号：US16264944
申请日：2019-02-01
申请人： Intel Corporation
发明人： Phil Geng , Xiang Li , George Vergis , Mani Prakash
摘要： An embodiment of a connector housing for a circuit board may include a connector body to receive the circuit board, and a relaxation mechanism mechanically coupled to the connector body to relax stress on the connector housing and maintain the circuit board received in the connector body under a load which exceeds a load threshold. Other embodiments are disclosed and claimed.
-
公开(公告)号：US20190141845A1
公开(公告)日：2019-05-09
申请号：US16220631
申请日：2018-12-14
申请人： Intel Corporation
发明人： Mani Prakash , Thomas T. Holden , Aaron Gorius , Michael T. Crocker , Matthew J. Adiletta , Russell Aoki
摘要： A configurable processor module includes a central processing unit (CPU) package mounted to a CPU substrate, which may be mounted to a circuit board substrate. The CPU substrate may include physical resources usable by the CPU package, which may not be included or duplicated on the circuit board substrate. As such, features of the CPU package that are unavailable on the circuit board substrate may be available on the CPU substrate. Additionally, the CPU substrate and physical resources may be selected and designed so as to provide varying levels of functionality across different compute devices that use the same type of CPU package.
-
公开(公告)号：US09832876B2
公开(公告)日：2017-11-28
申请号：US14575775
申请日：2014-12-18
申请人： INTEL CORPORATION
发明人： Mani Prakash , Thomas T. Holden , Jeffory L. Smalley , Ram S. Viswanath , Bassam N. Coury , Dimitrios Ziakas , Chong J. Zhao , Jonathan W. Thibado , Gregorio R. Murtagian , Kuang C. Liu , Rajasekaran Swaminathan , Zhichao Zhang , John M. Lynch , David J. Llapitan , Sanka Ganesan , Xiang Li , George Vergis
CPC分类号： H05K1/181 , H01L23/00 , H01L23/498 , H01L2224/16225 , H01L2924/15311 , H01R12/712 , H01R12/79 , H05K2201/10159 , H05K2201/10325 , Y02P70/611
摘要： Configurable central processing unit (CPU) package substrates are disclosed. A package substrate is described that includes a processing device interface. The package substrate also includes a memory device electrical interface disposed on the package substrate. The package substrate also includes a removable memory mechanical interface disposed proximately to the memory device electrical interface. The removable memory mechanical interface is to allow a memory device to be easily removed from the package substrate after attachment of the memory device to the package substrate.
-
-
-
-
-
-
-
-
-
搜索结果
18 条记录 (耗时 0.017 秒)