公开(公告)号：US20250045976A1

公开(公告)日：2025-02-06

申请号：US18362489

申请日：2023-07-31

Applicant: International Business Machines Corporation

Inventor： Jeremy R. Fox ,  Alexander Reznicek ,  Bahman Hekmatshoartabari ,  Martin G. Keen

IPC: G06T11/00 ,  A61B5/00 ,  A61B5/16 ,  G06F3/01 ,  G06N3/0475 ,  G06N3/08 ,  G10L25/63

Abstract: Rendering an emotional state of a virtual reality headset user is provided. An emotion feature vector predicting a current emotional state of a user of a virtual reality headset is mapped to a matching set of existing avatar vectors a mapping function. A best matching avatar vector is selected from the matching set of existing avatar vectors based on determining that values of the best matching avatar vector most closely match values of the emotion feature vector predicting the current emotional state of the user of the virtual reality headset. An avatar associated with the user is rendered in a metaverse consistent with the current emotional state of the user of the virtual reality headset based on the best matching avatar vector to the emotion feature vector predicting the current emotional state of the user.

公开(公告)号：US20250044862A1

公开(公告)日：2025-02-06

申请号：US18362060

申请日：2023-07-31

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Martin G. Keen ,  Jeremy R. Fox ,  Bahman Hekmatshoartabari ,  Alexander Reznicek

IPC: G06F3/01

Abstract: A computer-implemented method, a computer system and a computer program product recommend an optimal break for a user. The method includes capturing activity data for the user from an environment using a device. The method also includes obtaining prior activity data related to the user and identifying a preferred break type for the user, wherein the preferred break type for the user is associated with a prior activity of the user. In addition, the method includes determining that the user needs a break from a current activity based on the activity data. The method further includes generating a break recommendation for the user, wherein the break recommendation associates the preferred break type for the user with the current activity in the activity data. Lastly, the method includes displaying the break recommendation to the user.

公开(公告)号：US20250040444A1

公开(公告)日：2025-01-30

申请号：US18358057

申请日：2023-07-25

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： MATTHIAS GEORG GOTTWALD ,  Guohan Hu ,  Virat Vasav Mehta ,  John Bruley ,  Alexander Reznicek

IPC: H10N50/85 ,  H01F10/32 ,  H10N50/01

Abstract: Embodiments of present invention provide a magnetoresistive random-access-memory (MRAM). The MRAM includes a reference layer; a tunnel barrier layer of magnesium-oxide (MgO); and a free layer, where the free layer includes a first cobalt-iron-boron (CoFeB) layer on top of the tunnel barrier layer; a spacer layer on top of the first CoFeB layer; a second CoFeB layer on top of the spacer layer; and a capping layer of MgO on top of the second CoFeB layer. Additionally, the first and the second CoFeB layer are substantially depleted of boron (B) to include respectively a first region adjacent to the tunnel barrier layer and the capping layer respectively and a second region adjacent to the spacer layer, where the first regions of the first and the second CoFeB layer include crystallized cobalt-iron (CoFe) and the second regions of the first and the second CoFeB layer include amorphous CoFe alloy.

公开(公告)号：US20240429283A1

公开(公告)日：2024-12-26

申请号：US18337787

申请日：2023-06-20

Applicant: International Business Machines Corporation

Inventor： Alexander Reznicek ,  Sagarika Mukesh ,  Tsung-Sheng Kang ,  Ruilong Xie

IPC: H01L29/08 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: Embodiments are disclosed for a semiconductor structure. The semiconductor structure includes a field effect transistor (FET). The FET includes a source/drain (S/D) epitaxy and a metal gate. Additionally, the semiconductor structure includes a backside epitaxy in electrical contact with the S/D epitaxy. Further, the backside epitaxy includes a highly doped epitaxy. Additionally, the semiconductor structure includes a backside contact in electrical contact with the backside epitaxy. Further, the semiconductor structure includes a backside power distribution network in electrical contact with the backside contact.

公开(公告)号：US12176434B2

公开(公告)日：2024-12-24

申请号：US16920721

申请日：2020-07-05

Applicant: International Business Machines Corporation

Inventor： Heng Wu ,  Ruilong Xie ,  Alexander Reznicek ,  Lan Yu

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/06 ,  H01L29/165 ,  H01L29/267 ,  H01L29/32 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: Strained semiconductor FET devices with epitaxial quality improvement are provided. In one aspect, a semiconductor FET device includes: a substrate; at least one device stack including active layers oriented horizontally one on top of another on the substrate; gates surrounding at least a portion of each of the active layers; gate spacers alongside the gates; and source/drains, interconnected by the active layers, on opposite sides of the gates, wherein the source/drains are offset from the gates by inner spacers, wherein the source/drains include an epitaxial material having a low defect density which induces strain in the active layers, and wherein the gate spacers are formed from a same material as the inner spacers. A method of forming the semiconductor FET device using a spacer last process is also provided.

公开(公告)号：US20240405112A1

公开(公告)日：2024-12-05

申请号：US18327114

申请日：2023-06-01

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Ruilong Xie ,  Kisik Choi ,  Terence Hook ,  Alexander Reznicek ,  Daniel Schmidt ,  Tsung-Sheng Kang

IPC: H01L29/775 ,  H01L23/528 ,  H01L27/02 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

Abstract: A microelectronic structure including a nanosheet transistor that includes a source/drain. A frontside contact that includes a first section located on the frontside of the source/drain and a via section that extends to the backside of the nanosheet transistor. A shallow isolation layer located around a portion of the via section the first frontside contact. A backside metal line located on a backside surface of the via section and located on a backside surface of the shallow trench isolation layer. A dielectric liner located along a sidewall of the backside metal line and located along a bottom surface of the backside metal line.

公开(公告)号：US20240399666A1

公开(公告)日：2024-12-05

申请号：US18326290

申请日：2023-05-31

Applicant: International Business Machines Corporation

Inventor： Jeremy R. Fox ,  Martin G. Keen ,  Alexander Reznicek ,  Bahman Hekmatshoartabari

IPC: B29C64/393 ,  B33Y30/00 ,  B33Y50/02

Abstract: Embodiments of the invention are directed to a computer system having a memory coupled to a processor system, wherein the processor system is operable to perform processor system operations that include accessing a model of a physical object; and accessing instructions associated with the model of the physical object. The instructions are used to control a printhead coupled to a unique-identifier-element-infused (UIE-infused) filament source to print the physical object from UIE-infused filament.

公开(公告)号：US12156395B2

公开(公告)日：2024-11-26

申请号：US17644076

申请日：2021-12-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Choonghyun Lee ,  Takashi Ando ,  Jingyun Zhang ,  Alexander Reznicek

IPC: H10B10/00 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device is provided. The semiconductor device includes a first device including a first nanosheet stack formed on a substrate, the first nanosheet stack including alternating layers of a first work function metal (WFM) gate layer and an active semiconductor layer, a second nanosheet stack formed on the substrate, the second nanosheet stack including alternating layers of a second WFM gate layer and the active semiconductor layer, a shallow trench isolation (STI) region formed in the substrate between the first nanosheet stack and the second nanosheet stack, and an STI divot formed in the STI region. The first WFM gate layer of the first nanosheet stack is formed in the STI divot.

公开(公告)号：US12154985B2

公开(公告)日：2024-11-26

申请号：US18232640

申请日：2023-08-10

Applicant: International Business Machines Corporation

Inventor： Ruilong Xie ,  Chen Zhang ,  Julien Frougier ,  Alexander Reznicek ,  Shogo Mochizuki

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/66

Abstract: A uniform moon-shaped bottom spacer for a VTFET device is provided utilizing a replacement bottom spacer that is epitaxially grown above a bottom source/drain region. After filling a trench that is formed into a substrate with a dielectric fill material that also covers the replacement bottom spacer, the replacement bottom spacer is accessed, removed and then replaced with a moon-shaped bottom spacer.

公开(公告)号：US12144271B2

公开(公告)日：2024-11-12

申请号：US17444841

申请日：2021-08-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Oleg Gluschenkov ,  Alexander Reznicek ,  Youngseok Kim ,  Injo Ok ,  Soon-Cheon Seo

IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

Abstract: A semiconductor structure may include a resistive random access memory device embedded between an upper metal interconnect and a lower metal interconnect in a backend structure of a chip. The resistive random access memory may include a first electrode and a second electrode separated by a dielectric film. A portion of the dielectric film directly above the first electrode may be crystalline. The semiconductor structure may include a stud below and in electrical contact with the first electrode and the lower metal interconnect and a dielectric layer between the upper metal interconnect and the lower metal interconnect. The dielectric layer may separate the upper metal interconnect from the lower metal interconnect. The crystalline portion of the dielectric film may include grain boundaries that extend through an entire thickness of the dielectric film. The crystalline portion of the dielectric film may include grains.