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    Extrinsic base doping for bipolar junction transistors
    1.
    发明授权
    Extrinsic base doping for bipolar junction transistors 有权

    公开(公告)号：US10784346B2

    公开(公告)日：2020-09-22

    申请号：US16516815

    申请日：2019-07-19

    申请人： International Business Machines Corporation

    发明人： Renata Camillo-Castillo ,  David L. Harame ,  Qizhi Liu

    IPC分类号： H01L29/10 ,  H01L21/225 ,  H01L21/324 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/737 ,  H01L29/732

    摘要： A method includes forming a base layer on a top surface of a substrate. A dielectric layer is formed on exposed surfaces of the base layer. A hardmask layer is formed on the base layer and the dielectric layer. A pattern is formed from the hardmask with a first opening and a second opening. Portions of a dielectric layer are removed from the top surface of the base layer at positions consistent with the pattern of the first opening and the second opening to form exposed surfaces defined as a first window and a second window in the dielectric layer. Deposits of a dopant-containing layer are limited on the exposed surfaces of: a first portion on the top surface of the base layer inside of the first window, and a second portion on the top surface of the base layer inside of the second window.

    BIPOLAR JUNCTION TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE
    4.
    发明申请
    BIPOLAR JUNCTION TRANSISTORS WITH REDUCED BASE-COLLECTOR JUNCTION CAPACITANCE 有权
    具有降低的基极集电极结电容的双极晶体管

    公开(公告)号：US20150311283A1

    公开(公告)日：2015-10-29

    申请号：US14734713

    申请日：2015-06-09

    申请人： International Business Machines Corporation

    发明人： James W. Adkisson ,  James R. Elliott ,  David L. Harame ,  Marwan H. Khater ,  Robert K. Leidy ,  Qizhi Liu ,  John J. Pekarik

    IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/732

    CPC分类号： H01L29/0649 ,  H01L29/045 ,  H01L29/0804 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66257 ,  H01L29/66287 ,  H01L29/73 ,  H01L29/7325 ,  H01L29/7375

    摘要： Device structures for a bipolar junction transistor. The device structure includes a collector region, an intrinsic base formed on the collector region, an emitter coupled with the intrinsic base and separated from the collector by the intrinsic base, and an isolation region extending through the intrinsic base to the collector region. The isolation region is formed with a first section having first sidewalls that extend through the intrinsic base and a second section with second sidewalls that extend into the collector region. The second sidewalls are inclined relative to the first sidewalls. The isolation region is positioned in a trench that is formed with first and second etching process in which the latter etches different crystallographic directions of a single-crystal semiconductor material at different etch rates.

    摘要翻译： 双极结型晶体管的器件结构。 器件结构包括集电极区域，形成在集电极区域上的本征基极，与本征基极耦合并与集电极与本征基极分离的发射极，以及延伸穿过本征基极到集电极区域的隔离区域。 隔离区形成有具有延伸穿过本征基底的第一侧壁的第一部分和具有延伸到收集器区域中的第二侧壁的第二部分。 第二侧壁相对于第一侧壁倾斜。 隔离区域位于形成有第一和第二蚀刻工艺的沟槽中，其中后者以不同的蚀刻速率蚀刻单晶半导体材料的不同晶体方向。

    PNP BIPOLAR JUNCTION TRANSISTOR FABRICATION USING SELECTIVE EPITAXY
    6.
    发明申请
    PNP BIPOLAR JUNCTION TRANSISTOR FABRICATION USING SELECTIVE EPITAXY 有权
    PNP双极晶体管制造使用选择性外延

    公开(公告)号：US20150008562A1

    公开(公告)日：2015-01-08

    申请号：US14497579

    申请日：2014-09-26

    申请人： International Business Machines Corporation

    发明人： David L. Harame ,  Qizhi Liu

    IPC分类号： H01L29/735 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/10

    CPC分类号： H01L29/735 ,  H01L21/8224 ,  H01L21/8228 ,  H01L27/0821 ,  H01L29/0649 ,  H01L29/0808 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/1008 ,  H01L29/16 ,  H01L29/6625 ,  H01L29/66272 ,  H01L29/7371

    摘要： Lateral PNP bipolar junction transistors and design structures for a lateral PNP bipolar junction transistor. An emitter and a collector of the lateral PNP bipolar junction transistor are comprised of p-type semiconductor material that is formed by a selective epitaxial growth process. The source and drain each directly contact a top surface of a device region used to form the emitter and collector. A base contact may be formed on the top surface and overlies an n-type base defined within the device region. The emitter is laterally separated from the collector by the base contact. Another base contact may be formed in the device region that is separated from the other base contact by the base.

    摘要翻译： 横向PNP双极结晶体管和横向PNP双极结晶体管的设计结构。 横向PNP双极结晶体管的发射极和集电极由通过选择性外延生长工艺形成的p型半导体材料组成。 源极和漏极各自直接接触用于形成发射极和集电极的器件区域的顶表面。 基部触点可以形成在顶表面上并且覆盖限定在器件区域内的n型基极。 发射极通过基座触点与收集器横向分开。 另一个基底接触可以形成在由基部与另一个基部接触分离的器件区域中。

    METHOD TO BRIDGE EXTRINSIC AND INTRINSIC BASE BY SELECTIVE EPITAXY IN BICMOS TECHNOLOGY
    9.
    发明申请
    METHOD TO BRIDGE EXTRINSIC AND INTRINSIC BASE BY SELECTIVE EPITAXY IN BICMOS TECHNOLOGY 有权
    通过选择性外延在BICMOS技术中桥接特征和内在基础的方法

    公开(公告)号：US20140084420A1

    公开(公告)日：2014-03-27

    申请号：US13627179

    申请日：2012-09-26

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： James W. Adkisson ,  Kevin K. Chan ,  David L. Harame ,  Qizhi Liu ,  John J. Pekarik

    IPC分类号： H01L21/331 ,  H01L29/732

    CPC分类号： H01L29/7371 ,  H01L21/82285 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/16 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7378

    摘要： A method of forming a heterojunction bipolar transistor. The method includes providing a structure comprising at least an intrinsic base region and an emitter pedestal region. A stack is formed on the intrinsic base region. The stack comprises a polysilicon layer and a top sacrificial oxide layer. A trench is formed in the structure. The trench circumscribes the intrinsic base region and the stack. An extrinsic base is formed at two regions around the stack. The extrinsic base is formed by a selective epitaxial growth process to create a bridge over the trench. The bridge connects the two regions. An opening is provided in the stack. The opening exposes a portion of the intrinsic base region. An emitter is formed in the opening.

    摘要翻译： 一种形成异质结双极晶体管的方法。 该方法包括提供包括至少本征基极区域和发射极基座区域的结构。 在本征基区上形成堆叠。 堆叠包括多晶硅层和顶部牺牲氧化物层。 在结构中形成沟槽。 沟槽围绕内在的基极区域和叠层。 在堆叠周围的两个区域形成一个非本征基。 外部基极通过选择性外延生长工艺形成，以在沟槽上形成桥。 桥梁连接两个地区。 在堆栈中提供一个开口。 开口暴露了内在基础区域的一部分。 在开口中形成发射体。