Abstract:
A reconfigurable bandstop filter and methods of designing and reconfiguring the bandstop filter are disclosed. The reconfigurable bandstop filter includes a plurality of transmission lines each including a phase shifter. The reconfigurable bandstop filter further includes a signal input port having a phase shifter and a signal output port having a phase shifter. The signal input port and the signal output port is coupled to the plurality of transmission lines.
Abstract:
A radiation signal measurement system for millimeter wave transceivers is disclosed. Embodiments of the present invention utilize a laser to align the laser with an antenna. The transceiver is then moved into the path of the laser to align the laser with the transceiver. The transceiver or antenna orientation is changed such that the transceiver and antenna face each other, in an aligned position. Millimeter wave absorber material is applied to the inside and outside of the testing chamber to minimize reflections and interference from outside sources.
Abstract:
Disclosed are test structures for radio frequency (RF) power stress and characterization. Each test structure incorporates a single device and is selectively operated in either a stress mode, during which the device is stressed under RF power, or in an analysis mode, during which the impact of the applied stress on the performance of the device is characterized. During the stress mode, an input RF power signal is applied to the device through an RF signal input port and an output RF power signal is captured from the device at an RF signal output port. Depending upon the impedance value of the device at issue, the RF signal input port and the RF signal output port are connected to either the same terminal or opposing terminals and the need for impedance tuning is avoided. Also disclosed are test systems and methods for selectively controlling operation of such a test structure.
Abstract:
Various embodiments include wafer level chip scale package (WLCSP) structures and methods of tuning such structures. In some embodiments, the WLCSP structure includes: a printed circuit board (PCB) trace connection including at least one PCB ground connection connected with a PCB ground plane; a set of ground solder balls each contacting the printed circuit board trace connection; a set of chip pads contacting each of the ground solder balls in the set of ground solder balls; a chip ground plane connecting the set of chip pads; and a signal interconnect interposed between two of the set of ground solder balls, the signal interconnect including: a signal trace connection electrically isolated from the PCB ground plane; a signal ball contacting the signal PCB trace connection; a chip pad contacting the signal ball, and a signal trace connection on a chip contacting the chip pad.
Abstract:
Aspects of the invention provide for a Marchand balun structure and a related design method. In one embodiment, a marchand balun structure includes: a first trace for an unbalanced port on a first metal layer, the first trace comprising: an unbalanced line including a first width for a first half and a second width for a second half, wherein the second width can be different from the first width; a pair of traces for balanced ports on a second metal layer, the pair of traces comprising: a pair of balanced lines; and a ground plane on a third metal layer, the ground plane comprising: a pair of openings directly under the pair of traces for balanced ports, wherein a center of the unbalanced line of the first trace is offset from a center of the pair of balanced lines of the pair of traces.
Abstract:
A system, method and apparatus may comprise a wafer having a plurality of spiral test structures located on the kerf of the wafer. The spiral test structure may comprise a spiral connected at either end by a capacitor to allow the spiral test structure to resonate. The spiral structures may be located on a first metal layer or on multiple metal layers. The system may further incorporate a test apparatus having a frequency transmitter and a receiver. The test apparatus may be a sensing spiral which may be placed over the spiral test structures. A controller may provide a range of frequencies to the test apparatus and receiving the resonant frequencies from the test apparatus. The resonant frequencies will be seen as reductions in signal response at the test apparatus.
Abstract:
A test circuit for a ring oscillator comprising a plurality of inverting stages includes a power supply, the power supply configured to provide a voltage to the plurality of inverting stages of the ring oscillator at a power output; and a power sensing resistor located between the power output of the power supply and direct current (DC) bias inputs of the inverting stages of the ring oscillator, wherein a signal from the power sensing resistor is configured to be monitored to determine a characteristic of the ring oscillator.
Abstract:
A method includes phase-shifting an output signal of a phase lock loop (PLL) circuit by applying an injection current to an output of a charge pump of a the PLL circuit. A circuit includes: a first phase lock loop (PLL) circuit and a second PLL circuit referenced to a same clock; a phase detector circuit that detects a phase difference between an output signal of the first PLL circuit and an output signal of the second PLL circuit; and an adjustable current source that applies an injection current to at least one of the first PLL circuit and the second PLL circuit based on an output of the phase detector circuit.
Abstract:
Aspects of the invention provide for an architecture and method for testing high frequency phase shifter arrays. In one embodiment, an architecture for testing a phase shifter array, includes: a plurality of power dividers, each power divider configured to receive an output from a phase shifter within the phase shifter array and split the output into a first signal and a second signal; a plurality of power clippers, each power clipper configured to receive the second signal and modify the second signal by limiting an amplitude of the second signal; a first power combiner configured to receive the first signal from each of the plurality of power dividers to generate a first output; and a second power combiner configured to receive the modified second signal from each of the plurality of power clippers to generate a second output.
Abstract:
Aspects of the invention provide for a Marchand balun structure and a related design method. In one embodiment, a marchand balun structure includes: a first trace for an unbalanced port on a first metal layer, the first trace comprising: an unbalanced line including a first width for a first half and a second width for a second half, wherein the second width can be different from the first width; a pair of traces for balanced ports on a second metal layer, the pair of traces comprising: a pair of balanced lines; and a ground plane on a third metal layer, the ground plane comprising: a pair of openings directly under the pair of traces for balanced ports, wherein a center of the unbalanced line of the first trace is offset from a center of the pair of balanced lines of the pair of traces.